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AD650 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD650
Beschreibung Voltage-to-Frequency and Frequency-to-Voltage Converter
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
AD650 Datasheet, Funktion
a
FEATURES
V/F Conversion to 1 MHz
Reliable Monolithic Construction
Very Low Nonlinearity
0.002% typ at 10 kHz
0.005% typ at 100 kHz
0.07% typ at 1 MHz
Input Offset Trimmable to Zero
CMOS or TTL Compatible
Unipolar, Bipolar, or Differential V/F
V/F or F/V Conversion
Available in Surface Mount
MIL-STD-883 Compliant Versions Available
Voltage-to-Frequency and
Frequency-to-Voltage Converter
AD650
PIN CONFIGURATION
PRODUCT DESCRIPTION
The AD650 V/F/V (voltage-to-frequency or frequency-to-voltage
converter) provides a combination of high frequency operation
and low nonlinearity previously unavailable in monolithic form.
The inherent monotonicity of the V/F transfer function makes
the AD650 useful as a high-resolution analog-to-digital converter.
A flexible input configuration allows a wide variety of input volt-
age and current formats to be used, and an open-collector output
with separate digital ground allows simple interfacing to either
standard logic families or opto-couplers.
The linearity error of the AD650 is typically 20 ppm (0.002%
of full scale) and 50 ppm (0.005%) maximum at 10 kHz full
scale. This corresponds to approximately 14-bit linearity in an
analog-to-digital converter circuit. Higher full-scale frequencies
or longer count intervals can be used for higher resolution con-
versions. The AD650 has a useful dynamic range of six decades
allowing extremely high resolution measurements. Even at 1 MHz
full scale, linearity is guaranteed less than 1000 ppm (0.1%) on
the AD650KN, BD, and SD grades.
In addition to analog-to-digital conversion, the AD650 can be used
in isolated analog signal transmission applications, phased locked-
loop circuits, and precision stepper motor speed controllers. In
the F/V mode, the AD650 can be used in precision tachometer
and FM demodulator circuits.
The input signal range and full-scale output frequency are user-
programmable with two external capacitors and one resistor.
Input offset voltage can be trimmed to zero with an external
potentiometer.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
The AD650JN and AD650KN are offered in a plastic 14-lead
DIP package. The AD650JP is available in a 20-lead plastic
leaded chip carrier (PLCC). Both plastic packaged versions of the
AD650 are specified for the commercial (0°C to +70°C) tempera-
ture range. For industrial temperature range (–25°C to +85°C)
applications, the AD650AD and AD650BD are offered in a
ceramic package. The AD650SD is specified for the full –55°C
to +125°C extended temperature range.
PRODUCT HIGHLIGHTS
1. In addition to very high linearity, the AD650 can operate at
full-scale output frequency up to 1 MHz. The combination of
these two features makes the AD650 an inexpensive solution
for applications requiring high resolution monotonic A/D
conversion.
2. The AD650 has a very versatile architecture that can be con-
figured to accommodate bipolar, unipolar, or differential
input voltages, or unipolar input currents.
3. TTL or CMOS compatibility is achieved using an open
collector frequency output. The pull-up resistor can be
connected to voltages up to +30 V, or +15 V or +5 V for
conventional CMOS or TTL logic levels.
4. The same components used for V/F conversion can also be
used for F/V conversion by adding a simple logic biasing net-
work and reconfiguring the AD650.
5. The AD650 provides separate analog and digital grounds.
This feature allows prevention of ground loops in real-world
applications.
6. The AD650 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD650/883B data sheet for detailed
specifications.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000






AD650 Datasheet, Funktion
AD650
BIPOLAR V/F
Figure 4 shows how the internal bipolar current sink is used to
provide a half-scale offset for a ± 5 V signal range, while provid-
ing a 100 kHz maximum output frequency. The nominally 0.5 mA
(± 10%) offset current sink is enabled when a 1.24 kresistor is
connected between Pins 4 and 5. Thus, with the grounded 10 k
nominal resistance shown, a –5 V offset is developed at Pin 2.
Since Pin 3 must also be at –5 V, the current through RIN is
10 V/40 k= +0.25 mA at VIN = +5 V, and 0 mA at
VIN = –5 V.
Components are selected using the same guidelines outlined for
the unipolar configuration with one alteration. The voltage
across the total signal range must be equated to the maximum
Figure 4. Connections for ±5 V Bipolar V/F with 0 to
100 kHz TTL Output
input voltage in the unipolar configuration. In other words, the
value of the input resistor RIN is determined by the input voltage
span, not the maximum input voltage. A diode from Pin 1 to
ground is also recommended. This is further discussed in the
Other Circuit Conditions section.
As in the unipolar circuit, RIN and COS must have low tempera-
ture coefficients to minimize the overall gain drift. The 1.24 k
resistor used to activate the 0.5 mA offset current should also
have a low temperature coefficient. The bipolar offset current
has a temperature coefficient of approximately –200 ppm/°C.
Figure 5. Connection Diagram for V/F Conversion,
Negative Input Voltage
F/V CONVERSION
The AD650 also makes a very linear frequency-to-voltage
converter. Figure 6 shows the connection diagram for F/V con-
version with TTL input logic levels. Each time the input signal
crosses the comparator threshold going negative, the one shot is
activated and switches 1 mA into the integrator input for a
measured time period (determined by COS). As the frequency
increases, the amount of charge injected into the integration
capacitor increase proportionately. The voltage across the inte-
gration capacitor is stabilized when the leakage current through
R1 and R3 equals the average current being switched into the
integrator. The net result of these two effects is an average output
voltage which is proportional to the input frequency. Optimum
performance can be obtained by selecting components using the
same guidelines and equations listed in the V/F Conversion section.
The reader is referred to Analog Devices' Application Note
AN-279 where a more complete description of this application
can be found.
UNIPOLAR V/F, NEGATIVE INPUT VOLTAGE
Figure 5 shows the connection diagram for V/F conversion of
negative input voltages. In this configuration full-scale output
frequency occurs at negative full-scale input, and zero output
frequency corresponds with zero input voltage.
A very high impedance signal source may be used since it only
drives the noninverting integrator input. Typical input imped-
ance at this terminal is 1 Gor higher. For V/F conversion of
positive input signals using the connection diagram of Figure 1,
the signal generator must be able to source the integration cur-
rent to drive the AD650. For the negative V/F conversion circuit
of Figure 5, the integration current is drawn from ground
through R1 and R3, and the active input is high impedance.
Circuit operation for negative input voltages is very similar to
positive input unipolar conversion described in a previous sec-
tion. For best operating results use component equations listed
in that section.
Figure 6. Connection Diagram for F/V Conversion
HIGH FREQUENCY OPERATION
Proper RF techniques must be observed when operating the
AD650 at or near its maximum frequency of 1 MHz. Lead
lengths must be kept as short as possible, especially on the one
shot and integration capacitors, and at the integrator summing
junction. In addition, at maximum output frequencies above
500 kHz, a 3.6 kpull-down resistor from Pin 1 to –VS is required
(see Figure 7). The additional current drawn through the pull-
down resistor reduces the op amp’s output impedance and
improves its transient response.
–6– REV. C

6 Page









AD650 pdf, datenblatt
AD650
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Ceramic DIP
(D-14)
0.005 (0.13) MIN
0.098 (2.49) MAX
14 8
0.310 (7.87)
0.220 (5.59)
17
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
PIN 1
0.785 (19.94) MAX
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MAX
0.023 (0.58)
0.014 (0.36)
0.100 0.070 (1.78) SEATING
(2.54)
BSC
0.030 (0.76)
PLANE
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
14-Lead Plastic DIP
(N-14)
0.795 (20.19)
0.725 (18.42)
14 8 0.280 (7.11)
1 7 0.240 (6.10)
PIN 1
0.210 (5.33)
MAX
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.130
0.325 (8.25)
0.300 (7.62)
0.195 (4.95)
0.115 (2.93)
0.160 (4.06)
0.115 (2.93)
(3.30)
MIN
0.022 (0.558) 0.070 (1.77) SEATING
0.014 (0.356) 0.045 (1.15) PLANE
0.015 (0.381)
0.008 (0.204)
20-Lead PLCC
(P-20A)
0.048 (1.21)
0.042 (1.07)
0.056 (1.42)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
3 19
4 PIN 1 18
IDENTIFIER
TOP VIEW
(PINS DOWN)
0.050
(1.27)
BSC
0.020
(0.50)
R
8 14
9 13
0.356 (9.04)
0.350 (8.89)SQ
0.395 (10.02)
0.385 (9.78) SQ
0.180 (4.57)
0.165 (4.19)
0.025 (0.63)
0.015 (0.38)
0.021 (0.53)
0.013 (0.33) 0.330 (8.38)
0.032 (0.81) 0.290 (7.37)
0.026 (0.66)
0.040 (1.01)
0.025 (0.64)
0.110 (2.79)
0.085 (2.16)
–12–
REV. C

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