PDF AD6459 Data sheet ( Hoja de datos )

Número de pieza	AD6459
Descripción	GSM 3 V Receiver IF Subsystem
Fabricantes	Analog Devices
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No Preview Available ! a FEATURES Fully Compliant with Standard and Enhanced GSM Specification –11 dBm Input 1 dB Compression Point 0 dBm Input Third Order Intercept 10 dB SSB Noise Figure (50 ⍀) DC-500 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB and Stable over Temperature Voltage Gain Control Quadrature Demodulator On-Board Phase-Locked Quadrature Oscillator Demodulates IFs from 5 MHz to 50 MHz Low Power 8 mA at Midgain 2 ␮A Sleep Mode Operation 2.7 V to 5.5 V Operation Interfaces to AD7013, AD7015 and AD6421 Baseband Converters 20-Lead SSOP GSM 3 V Receiver IF Subsystem AD6459 FUNCTIONAL BLOCK DIAGRAM LO RF GAIN CONTROL FREF BPF I PLL Q AD6459 GENERAL DESCRIPTION The AD6459 is a 3 V, low power receiver IF subsystem for operation at input frequencies as high as 500 MHz and IFs from 5 MHz up to 50 MHz. It is optimized for operation in GSM, DCS1800 and PCS1900 receivers. It consists of a mixer, an IF amplifier, I and Q demodulators, a phase-locked quadra- ture oscillator, a precise AGC subsystem, and a biasing system with external power-down. The AD6459’s low noise, high intercept mixer is a doubly- balanced Gilbert-Cell type. It has a nominal –11 dBm input- referred 1 dB compression point and a 0 dBm input-referred third-order intercept. The mixer section of the AD6459 also includes a local oscillator (LO) preamplifier, which lowers the required LO drive to –16 dBm. The gain control input accepts an external gain-control voltage input from an external AGC detector or a DAC. It provides an 80 dB gain range with 27 mV/dB gain scaling. The I and Q demodulators provide in-phase and quadrature baseband outputs to interface with Analog Devices’ AD7013 (IS54, TETRA, MSAT) AD7015 and AD6421 (GSM, DCS1800, PCS1900) baseband converters. An on-board quadrature VCO that is externally phase-locked to the IF signal drives the I and Q demodulators. This locked reference signal is normally provided by an external VCTCXO under the control of the radio’s digital processor. The AD6459 can also provide demodulation of N-PSK and N-QAM in many non-TDMA systems when used with external analog carrier recovery systems such as the Costas Loop. Finally, the VCO can be phase-locked to a frequency that is deliberately offset from the IF as in the case of a Beat-Frequency oscillator (BFO) resulting in the product detection of CW or SSB. The AD6459 uses supply voltages from 2.7 V to 5.5 V over the temperature range of –40°C to +85°C. Operation is enabled by a CMOS logical level; response time is typically < 80 µs. When disabled, the standby current is reduced to 2 µA. The AD6459 comes in a 20-pin shrink small outline (SSOP) surface mount package. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1996 1 page 20 18 16 RIN = 50Ω, IF = 13MHz RIN = 50Ω, F = 45MHz 14 RIN = 50Ω, IF = 26MHz RIN = 1kΩ, IF = 13MHz 12 10 8 RIN = 400Ω, IF = 13MHz 6 50 100 150 200 250 300 350 400 450 RF FREQUENCY – dB Figure 3. Mixer Noise Figure vs. RF Frequency 2000 1800 1600 R SHUNT VGAIN = 2.2V C SHUNT VGAIN = 0.2V 5.0 4.8 4.6 1400 4.4 1200 1000 C SHUNT VGAIN = 1.0V 4.2 4.0 800 3.8 600 3.6 400 3.4 200 0 50 C SHUNT VGAIN = 2.2V R SHUNT VGAIN = 0.2V 3.2 3.0 100 150 200 250 300 350 400 450 500 550 RF FREQUENCY – MHz Figure 4. Mixer Input Impedance vs. RF Frequency, VPOS = 2.7 V, TA = +25°C 20 15 VGAIN = 0.2V 10 VGAIN = 1.0V 5 0 –5 VGAIN = 2.25V –10 50 100 150 200 250 300 350 400 450 RF FREQUENCY – MHz Figure 5. Mixer Conversion Gain vs. RF Frequency, TA = +25°C, VPOS = 2.7 V, VREF = 1.2 V, FIF = 26 MHz AD6459 20 VGAIN = 0.2V 15 10 VGAIN = 1.0V 5 0 VGAIN = 2.25V –5 –10 6 10 14 18 22 26 30 34 38 42 46 RF FREQUENCY – MHz Figure 6. Mixer Conversion Gain vs. IF Frequency, TA = +25°C, VPOS = 2.7 V, VREF = 1.2 V, FRF = 250 MHz 70 AMP/DEMOD, VPOS = 2.7V 60 AMP/DEMOD, VPOS = 5.5V 50 40 30 20 MIXER, VPOS = 2.7V 10 MIXER, VPOS = 5.5V 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 TEMPERATURE – °C Figure 7. Mixer Conversion Gain and IF Amplifier/ Demodulator Gain vs. Temperature, VGAIN = 0.2 V, VREF = 1.2 V , FIF = 26 MHz, FRF = 250 MHz –9 VPOS = 5.5V TA = +85°C –10 –11 –12 VPOS = 2.7V TA = +25°C –13 VPOS = 5.5V TA = +25°C VPOS = 2.7V TA = –25°C –14 –15 0 VPOS = 5.5V TA = –45°C 0.5 1 1.5 GAIN VOLTAGE – Volts 2 2.5 Figure 8. Mixer Input 1 dB Compression Point vs. VGAIN, VREF = 1.2 V, FRF = 250 MHz, FIF = 26 MHz REV. 0 –5– 5 Page AD6459 Reference Designation RFHI LOIP FREF MXOP IFIP J1 GREF GAIN QRXN QRXP IRXN IRXP VPOS PRUP GND GND FREF R9 50Ω LOIP RFHI R2 50Ω C3 SHORT R3 50Ω VPOS R6 24.9kΩ R7 16.9kΩ GREF C5 0.1µF R1 20kΩ VPOS C12 1nF C1 0.1µF 1 FREF VPS1 20 R8 1kΩ 2 COM1 FLTR 19 C11 0.1µF C2 3 PRUP VPS2 18 C10 1nF 1nF 4 C4 1nF LOIP AD6459 IRXP 17 5 RFLO IRXN 16 6 RFHI QRXP 15 C7 7 COM2 1nF 8 GREF 9 MXOP 10 MXOM QRXN 14 GAIN 13 IFIM 12 IFIP 11 C9 10nF JUMPER L3 SHORT C16 22pF C15 110pF L2 0.56µH L4 SHORT C17 22pF GND PRUP VPOS IRXP IRXN QRXP QRXN GAIN GREF Figure 27. Evaluation Board as Received with 19.5 MHz Filter Table II. AD6459 Evaluation Board Input and Output Connection Connector Type Description Coupling Approximate Signal Level Comments SMA SMA SMA SMA SMA Jumper J2-1 J2-2 J2-3 J2-4 J2-5 J2-6 J2-7 J2-8 J2-J9 J2-10 RF Input LO Input Demodulator Reference Input Mixer Output IF Input On-Board GREF Bias External Reference Input Gain Bias Input Q-Negative Output Q-Positive Output I-Negative Output I-Positive Output Power Supply Positive Input Power Up Ground Ground AC –11 dBm max AC 500 mV p-p max AC 100 mV p-p min NA NA NA NA DC DC DC DC–2 MHz DC–2 MHz DC-2 MHz DC-2 MHz DC DC-2 MHz DC DC 0.4 VPOS 1.2 V dc 0.2 V to 2.4 V dc NA NA NA NA 2.7 V to 5.5 V CMOS 0V 0V Input Is Terminated in 50 Ω Input Is Terminated in 50 Ω Input Is Terminated in 50 Ω Not Connected for Unbalanced Output Use XFMR Not Connected for Unbalanced Output Use XFMR Two Resistors Divider Gain Scaling Reference from External ADC Maw Gain at 0.2 V Z Series = 4.7 kΩ Z Series = 4.7 kΩ Z Series = 4.7 kΩ Z Series = 4.7 kΩ Supply Voltage If Left Unconnected, Board Is Active NA NA REV. 0 –11– 11 Page

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