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AD600 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD600
Beschreibung Dual/ Low Noise/ Wideband Variable Gain Amplifiers
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
AD600 Datasheet, Funktion
a
Dual, Low Noise, Wideband
Variable Gain Amplifiers
AD600/AD602*
FEATURES
Two Channels with Independent Gain Control
“Linear in dB” Gain Response
Two Gain Ranges:
AD600: 0 dB to +40 dB
AD602: –10 dB to +30 dB
Accurate Absolute Gain: ؎0.3 dB
Low Input Noise: 1.4 nV/Hz
Low Distortion: –60 dBc THD at ؎1 V Output
High Bandwidth: DC to 35 MHz (–3 dB)
Stable Group Delay: ؎2 ns
Low Power: 125 mW (max) per Amplifier
Signal Gating Function for Each Amplifier
Drives High Speed A/D Converters
MIL-STD-883 Compliant and DESC Versions Available
APPLICATIONS
Ultrasound and Sonar Time-Gain Control
High Performance Audio and RF AGC Systems
Signal Measurement
PRODUCT DESCRIPTION
The AD600 and AD602 dual channel, low noise variable gain
amplifiers are optimized for use in ultrasound imaging systems,
but are applicable to any application requiring very precise gain,
low noise and distortion, and wide bandwidth. Each indepen-
dent channel provides a gain of 0 dB to +40 dB in the AD600
and –10 dB to +30 dB in the AD602. The lower gain of the
AD602 results in an improved signal-to-noise ratio at the out-
put. However, both products have the same 1.4 nV/Hz input
noise spectral density. The decibel gain is directly proportional
to the control voltage, is accurately calibrated, and is supply-
and temperature-stable.
To achieve the difficult performance objectives, a proprietary
circuit form—the X-AMP®—has been developed. Each channel
of the X-AMP comprises a variable attenuator of 0 dB to
–42.14 dB followed by a high speed fixed gain amplifier. In this
way, the amplifier never has to cope with large inputs, and can
benefit from the use of negative feedback to precisely define the
gain and dynamics. The attenuator is realized as a seven-stage
R-2R ladder network having an input resistance of 100 , laser-
trimmed to ± 2%. The attenuation between tap points is 6.02 dB;
the gain-control circuit provides continuous interpolation be-
tween these taps. The resulting control function is linear in dB.
X-AMP is a registered trademark of Analog Devices, Inc.
*Patented.
FUNCTIONAL BLOCK DIAGRAM
SCALING
REFERENCE
PRECISION PASSIVE
INPUT ATTENUATOR
GAT1
GATING
INTERFACE
C1HI
C1LO
VG
GAIN CONTROL
INTERFACE
A1HI
A1LO
0dB –6.02dB –12.04dB –18.06dB –22.08dB –30.1dB –36.12dB –42.14dB
500
R – 2R LADDER NETWORK
62.5
RF2
2.24k(AD600)
694(AD602)
RF1
20
FIXED GAIN
AMPLIFIER
41.07dB (AD600)
31.07dB (AD602)
A1OP
A1CM
The gain-control interfaces are fully differential, providing an
input resistance of ~15 Mand a scale factor of 32 dB/V (that
is, 31.25 mV/dB) defined by an internal voltage reference. The
response time of this interface is less than 1 µs. Each channel
also has an independent gating facility that optionally blocks sig-
nal transmission and sets the dc output level to within a few mil-
livolts of the output ground. The gating control input is TTL
and CMOS compatible.
The maximum gain of the AD600 is 41.07 dB, and that of the
AD602 is 31.07 dB; the –3 dB bandwidth of both models is
nominally 35 MHz, essentially independent of the gain. The
signal-to-noise ratio (SNR) for a 1 V rms output and a 1 MHz
noise bandwidth is typically 76 dB for the AD600 and 86 dB for
the AD602. The amplitude response is flat within ± 0.5 dB from
100 kHz to 10 MHz; over this frequency range the group delay
varies by less than ± 2 ns at all gain settings.
Each amplifier channel can drive 100 load impedances with
low distortion. For example, the peak specified output is ± 2.5 V
minimum into a 500 load, or ± 1 V into a 100 load. For a
200 load in shunt with 5 pF, the total harmonic distortion for
a ± 1 V sinusoidal output at 10 MHz is typically –60 dBc.
The AD600J and AD602J are specified for operation from 0°C
to +70°C, and are available in both 16-pin plastic DIP (N) and
16-pin SOIC (R). The AD600A and AD602A are specified for
operation from –40°C to +85°C and are available in both 16-pin
cerdip (Q) and 16-pin SOIC (R).
The AD600S and AD602S are specified for operation from
–55°C to +125°C and are available in a 16-pin cerdip (Q) pack-
age and are MIL-STD-883 compliant. The AD600S and
AD602S are also available under DESC SMD 5962-94572.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703






AD600 Datasheet, Funktion
AD600/AD602
A1
–40.00dB
A2
–41.07dB
INPUT
0dB
VC = 0V
–40.00dB
C1HI C1LO
41.07dB
VG1
VO1 = 0.592V
1.07dB
(a)
–42.14dB
C1HI
C1LO
41.07dB
VG2
VO2 = 1.908V
OUTPUT
0dB
–0.51dB
–1.07dB
INPUT
0dB
VC = 1.25V
–0.51dB
C1HI C1LO
41.07dB
VG1
VO1 = 0.592V
40.56dB
(b)
–41.63dB
C1HI
C1LO
41.07dB
VG2
VO2 = 1.908V
OUTPUT
40dB
0dB 38.93dB
INPUT
0dB
VC = 25V
0dB
C1HI C1LO
41.07dB
VG1
VO1 = 0.592V
41.07dB
(c)
–2.14dB
C1HI
C1LO
41.07dB
VG2
VO2 = 1.908V
OUTPUT
80dB
Figure 3. AD600 Gain Control Input Calculations for Sequential Control Operation
The gains are offset (Figure 4) such that A2’s gain is increased
only after A1’s gain has reached its maximum value. Note that
for a differential input of –700 mV or less, the gain of a single
amplifier (A1 or A2) will be at its minimum value of –1.07 dB;
for a differential input of +700 mV or more, the gain will be at
its maximum value of 41.07 dB. Control inputs beyond these
limits will not affect the gain and can be tolerated without dam-
age or foldover in the response. See the Specifications Section of
this data sheet for more details on the allowable voltage range.
The gain is now
Gain (dB) = 32 VC
where VC is the applied control voltage.
(3)
+41.07dB
20dB
+1.07dB
A1
*
–0.56dB
40.56dB
A2
*
+38.93dB
–1.07dB
GAIN
(dB) –2.14
0
0
0.592
0.625
20
1.25
40
1.908
1.875
60
2.5 VC (V)
80 82.14
*GAIN OFFSET OF 1.07dB, OR 33.44mV
Figure 4. Explanation of Offset Calibration for Sequential
Control
When VC is set to zero, VG1 = –0.592 V and the gain of A1 is
+1.07 dB (recall that the gain of each amplifier section is 0 dB
for VG = 625 mV); meanwhile, VG2 = –1.908 V so the gain of
A2 is –1.07 dB. The overall gain is thus 0 dB (see Figure 3a).
When VC = +1.25 V, VG1 = 1.25 V– 0.592 V = +0.658 V, which
sets the gain of A1 to 40.56 dB, while VG2 = 1.25 V – 1.908 V =
–0.658 V, which sets A2’s gain at –0.56 dB. The overall gain is
now 40 dB (see Figure 3b). When VC = +2.5 V, the gain of A1
is 41.07 dB and that of A2 is 38.93 dB, resulting in an overall
gain of 80 dB (see Figure 3c). This mode of operation is further
clarified by Figure 5, which is a plot of the separate gains of A1
and A2 and the overall gain versus the control voltage. Figure 6
is a plot of the gain error of the cascaded amplifiers versus the
control voltage.
Parallel Mode (Simplest Gain-Control Interface)
In this mode, the gain-control voltage is applied to both inputs
in parallel—C1HI and C2HI are connected to the control volt-
age, and C1LO and C2LO are optionally connected to an offset
voltage of +0.625 V. The gain scaling is then doubled to 64 dB/
V, requiring only 1.25 V for an 80 dB change of gain. The am-
plitude of the gain ripple in this case is also doubled, as shown
in Figure 7, and the instantaneous signal-to-noise ratio at the
output of A2 decreases linearly as the gain is increased (Figure 8).
Low Ripple Mode (Minimum Gain Error)
As can be seen in Figures 6 and 7, the output ripple is periodic.
By offsetting the gains of Al and A2 by half the period of the
ripple, or 3 dB, the residual gain errors of the two amplifiers
can be made to cancel. Figure 9 shows the much lower gain rip
ple when configured in this manner. Figure 10 plots the S/N
ratio as a function of gain; it is very similar to that in the “Par-
allel Mode.”
–6– REV. A

6 Page









AD600 pdf, datenblatt
AD600/AD602
INPUT
1V RMS
MAX
(SINE WAVE) R1
115
R2 200
R3
133k
U3A
1/2
AD712
VG
15.625mV/dB
C1
0.1µF
C1LO
1
A1HI
A1LO
GAT1
2
3
4
GAT2
A2LO
5
6
A2HI
7
C2LO
8
A1
REF
A2
U1 AD600
R5
16.2k
C1HI
16
A1CM
15
A1OP
14
VPOS
13
VNEG
12
11 A2OP
10 A2CM
C2HI
9
+6V DEC
–6V DEC
C2
2µF
R4
3.01k
VRMS
AF/RF
OUTPUT
C4
4.7µF
+6V DEC
+6V
1 VINP
VPOS 14
U2
NC 2 AD636
13 NC
–6V DEC
3 VNEG
12 NC
4 CAVG
NC 5 VLOG
NC 6 BFOP
11 NC
COMM 10
LDLO 9
R6
3.16k
7 BFIN
VRMS 8
FB
+6V DEC
0.1µF
–6V DEC
R7
56.2k
FB
0.1µF
–6V
POWER SUPPLY
DECOUPLING NETWORK
1/2 U3B
AD712
+316.2mV
C3
1µF
VOUT
+100mV/dB
0V = 0dB (AT 10mV RMS)
NC = NO CONNECT
Figure 19. The Output of This Three-IC Circuit Is Proportional to the Decibel Value of the RMS Input
Note that the peak “log output” of ± 4 V requires the use of
± 6 V supplies for the dual op amp U3 (AD712) although lower
supplies would suffice for the AD600 and AD636. If only ± 5 V
supplies are available, it will be either necessary to use a reduced
value for VSCALE (say 1 V, in which case the peak output would
be only ± 2 V) or restrict the dynamic range of the signal to
about 60 dB.
As in the previous case, the two amplifiers of the AD600 are
used in cascade. However, the 6 dB attenuator and low-pass fil-
ter found in Figure 1 are replaced by a unity gain buffer ampli-
fier U3A, whose 4 MHz bandwidth eliminates the risk of
instability at the highest gains. The buffer also allows the use of
a high impedance coupling network (C1/R3) which introduces a
high-pass corner at about 12 Hz. An input attenuator of 10 dB
(X0.316) is now provided by R1 + R2 operating in conjunction
with the AD600’s input resistance of 100 . The adjustment
provides exact calibration of the logarithmic intercept VREF in
critical applications, but R1 and R2 may be replaced by a fixed
resistor of 215 if very close calibration is not needed, since the
input resistance of the AD600 (and all other key parameters of it
and the AD636) are already laser trimmed for accurate opera-
tion. This attenuator allows inputs as large as ± 4 V to be ac-
cepted, that is, signals with an rms value of 1 V combined with a
crest factor of up to 4.
The output of A2 is ac coupled via another 12 Hz high-pass fil-
ter formed by C2 and the 6.7 kinput resistance of the AD636.
The averaging time constant for the rms-dc converter is deter-
mined by C4. The unbuffered output of the AD636 (at Pin 8) is
compared with a fixed voltage of +316 mV set by the positive
supply voltage of +6 V and resistors R6 and R7. (VREF is pro-
portional to this voltage, and systems requiring greater calibra-
tion accuracy should replace the supply dependent reference
with a more stable source.)
Any difference in these voltages is integrated by the op amp
U3B, with a time constant of 3 ms formed by the parallel sum of
R6/R7 and C3. Now, if the output of the AD600 is too high, V
rms will be greater than the “setpoint” of 316 mV, causing the
output of U3B—that is, VOUT—to ramp up (note that the inte-
grator is noninverting). A fraction of VOUT is connected to the
inverting gain-control inputs of the AD600, so causing the gain
to be reduced, as required, until V rms is exactly equal to
316 mV, at which time the ac voltage at the output of A2 is
forced to be exactly 316 mV rms. This fraction is set by R4 and
R5 such that a 15.625 mV change in the control voltages of A1
and A2—which would change the gain of the cascaded amplifi-
ers by 1 dB—requires a change of 100 mV at VOUT. Notice here
that since A2 is forced to operate at an output level well below
its capacity, waveforms of high crest factor can be tolerated
throughout the amplifier.
To check the operation, assume an input of 10 mV rms is ap-
plied to the input, which results in a voltage of 3.16 mV rms at
the input to A1, due to the 10 dB loss in the attenuator. If the
system operates as claimed, VOUT (and hence VG) should be
zero. This being the case, the gain of both A1 and A2 will be
20 dB and the output of the AD600 will therefore be 100 times
(40 dB) greater than its input, which evaluates to 316 mV rms,
the input required at the AD636 to balance the loop. Finally,
note that unlike most AGC circuits, needing strong temperature
compensation for the internal “kT/q” scaling, these voltages,
and thus the output of this measurement system, are tempera-
ture stable, arising directly from the fundamental and exact
exponential attenuation of the ladder networks in the AD600.
Typical results are presented for a sine wave input at 100 kHz.
Figure 20 shows that the output is held very close to the
setpoint of 316 mV rms over an input range in excess of 80 dB.
–12–
REV. A

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