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AD8015 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8015
Beschreibung Wideband/Differential Output Transimpedance Amplifier
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 8 Seiten
AD8015 Datasheet, Funktion
a
FEATURES
Low Cost, Wide Bandwidth, Low Noise
Bandwidth: 240 MHz
Pulse Width Modulation: 500 ps
Rise Time/Fall Time: 1.5 ns
Input Current Noise: 3.0 pA/Hz @ 100 MHz
Total Input RMS Noise: 26.5 nA to 100 MHz
Wide Dynamic Range
Optical Sensitivity: –36 dBm @ 155.52 Mbps
Peak Input Current: ؎350 A
Differential Outputs
Low Power: 5 V @ 25 mA
Wide Operating Temperature Range: –40؇C to +85؇C
APPLICATIONS
Fiber Optic Receivers: SONET/SDH, FDDI, Fibre Channel
Stable Operation with High Capacitance Detectors
Low Noise Preamplifiers
Single-Ended to Differential Conversion
I-to-V Converters
PRODUCT DESCRIPTION
The AD8015 is a wide bandwidth, single supply transimpedance
amplifier optimized for use in a fiber optic receiver circuit. It is a
complete, single chip solution for converting photodiode current
into a differential voltage output. The 240 MHz bandwidth enables
AD8015 application in FDDI receivers and SONET/SDH
receivers with data rates up to 155 Mbps. This high bandwidth
supports data rates beyond 300 Mbps. The differential outputs
drive ECL directly, or can drive a comparator/ fiber optic post
amplifier.
In addition to fiber optic applications, this low cost, silicon al-
ternative to GaAs-based transimpedance amplifiers is ideal for
systems requiring a wide dynamic range preamplifier or single-
ended to differential conversion. The IC can be used with a
standard ECL power supply (–5.2 V) or a PECL (+5 V) power
supply; the common mode at the output is ECL compatible.
The AD8015 is available in die form, or in an 8-pin SOIC
package.
Wideband/Differential Output
Transimpedance Amplifier
AD8015
FUNCTIONAL BLOCK DIAGRAM
NC 1
IIN 2
NC 3
AD8015
10k
G = 30
50
+1
G=3
50
+1
8 +VS
7 +OUTPUT
6 –OUTPUT
VBYP 4
–+
1.7V
+VS
NC = NO CONNECT
5 –VS
25.0E+3
20.0E+3
DIFFERENTIAL
15.0E+3
10.0E+3
SINGLE-ENDED
5.0E+3
000.E+0
10.0E+6
100.0E+6
FREQUENCY – Hz
1.0E+9
Figure 1. Differential/Single-Ended Transimpedance vs.
Frequency
5.0
4.5 3.0pF
2.0pF
4.0
1.5pF
3.5
3.0
2.5
2.0
000.0E+0 20.0E+6
0.5pF
40.0E+6 60.0E+6
FREQUENCY – Hz
1.0pF
80.0E+6 100.0E+6
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Figure 2. Noise vs. Frequency (SO-8 Package with
Added Capacitance)
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703






AD8015 Datasheet, Funktion
AD8015
100
50
5V, +25°C
PIN 7
PIN 6
0
1
10 100
FREQUENCY – MHz
1000
Figure 12. Output Impedance vs. Frequency
100
0
–100
0
10
TIME – ns
20
Figure 13. Small Signal Pulse Response
2
0
1pF
–2
–4
5pF 0pF
–6
8pF 3pF
–8
–10
–12
10.0E+6
100.0E+6
FREQUENCY – Hz
1.0E+9
Figure 14. Differential Gain vs. Input Capacitance
APPLICATION
155 Mbps Fiber Optic Receiver
The AD8015 and AD807 can be used together for a complete
155 Mbps Fiber Optic Receiver (Transimpedance Amplifier,
Post Amplifier with Signal Detect Output, and Clock Recovery
and Data Retiming) as shown in Figure 16.
The PIN diode front end is connected to a single mode, 1300 nm
laser source. The PIN diode has 3.3 V reverse bias, 0.8 A/W
responsivity, 0.7 pF capacitance, and 2.5 GHz bandwidth.
The AD8015 outputs (POUT and NOUT) drive a differential, con-
stant impedance (50 ) low-pass π filter with a 3 dB cutoff of
100 MHz. The outputs of the low-pass filter are ac coupled to
the AD807 inputs (PIN and NIN). The AD807 PLL damping
factor is set at 10 using a 0.22 µF capacitor.
The entire circuit was enclosed in a shielded box. Table I sum-
marizes results of tests performed using a 223–1 PRN sequence,
and varying the average power at the PIN diode.
The circuit acquires and maintains lock with an average input
power as low as –39.25 dBm.
30 DEVICES, 2 LOTS:
(+OUT, –OUT) × (25°C, –40°C, 85°C) × (5V, 4.5V, 11.0V)
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
FREQUENCY – Hz
Figure 15. Bandwidth Distribution Matrix
–6– REV. A

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