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AD7846 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7846
Beschreibung LC2MOS 16-Bit Voltage Output DAC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 16 Seiten
AD7846 Datasheet, Funktion
a
LC2MOS
16-Bit Voltage Output DAC
FEATURES
16-Bit Monotonicity over Temperature
؎2 LSBs Integral Linearity Error
Microprocessor Compatible with Readback Capability
Unipolar or Bipolar Output
Multiplying Capability
Low Power (100 mW Typical)
AD7846
FUNCTIONAL BLOCK DIAGRAM
VCC
VDD
VREF +
R
16
R
SEGMENT
SWITCH
MATRIX
VREF –
R
4
A2
A1
AD7846
R
R
12-BIT DAC
12
DAC LATCH
12
I/O LATCH
A3
CONTROL
LOGIC
RIN
VOUT
CS
R/ W
LDAC
CLR
GENERAL DESCRIPTION
The AD7846 is a 16-bit DAC constructed with Analog Devices’
LC2MOS process. It has VREF+ and VREF– reference inputs and
an on-chip output amplifier. These can be configured to give a
unipolar output range (0 V to +5 V, 0 V to +10 V) or bipolar
output ranges (± 5 V, ± 10 V).
The DAC uses a segmented architecture. The 4 MSBs in the
DAC latch select one of the segments in a 16-resistor string.
Both taps of the segment are buffered by amplifiers and fed to a
12-bit DAC, which provides a further 12 bits of resolution. This
architecture ensures 16-bit monotonicity. Excellent integral
linearity results from tight matching between the input offset
voltages of the two buffer amplifiers.
In addition to the excellent accuracy specifications, the AD7846
also offers a comprehensive microprocessor interface. There are
16 data I/O pins, plus control lines (CS, R/W, LDAC and CLR).
R/W and CS allow writing to and reading from the I/O latch.
This is the readback function which is useful in ATE applica-
tions. LDAC allows simultaneous updating of DACs in a multi-
DAC system and the CLR line will reset the contents of the
DAC latch to 00 . . . 000 or 10 . . . 000 depending on the state
of R/W. This means that the DAC output can be reset to 0 V in
both the unipolar and bipolar configurations.
The AD7846 is available in 28-lead plastic, ceramic, and PLCC
packages.
VSS
DB15 DB0
DGND
PRODUCT HIGHLIGHTS
1. 16-Bit Monotonicity
The guaranteed 16-bit monotonicity over temperature makes
the AD7846 ideal for closed-loop applications.
2. Readback
The ability to read back the DAC register contents minimizes
software routines when the AD7846 is used in ATE systems.
3. Power Dissipation
Power dissipation of 100 mW makes the AD7846 the lowest
power, high accuracy DAC on the market.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000






AD7846 Datasheet, Funktion
AD7846Typical Performance Curves
8
VDD = +15V
VSS = 15V
VREF+ = +1Vrms
6 VREF= 0V
4
2
Figure 4. AC Feedthrough. VREF+ =
1 V rms, 10 kHz Sine Wave
0
102
103 104
105
FREQUENCY Hz
106
Figure 5. AC Feedthrough vs.
Frequency
30
VDD = +15V
VSS = 15V
VREF+ = ؎5V SINE WAVE
VREF= 0V
GAIN = +2
20
10
0
101 102 103 104 105 106 107
FREQUENCY Hz
Figure 6. Large Signal Frequency
Response
500
VREF+ = VREF= 0V
GAIN = +1
400 DAC LOADED WITH ALL 1s
300
200
100
0
102
103 104
105
FREQUENCY Hz
106
Figure 7. Noise Spectral Density
VOUT
50mV/DIV
VOUT
50mV/DIV
LDAC
5V/DIV
DATA
5V/DIV
DATA
5V/DIV
0.5s/DIV
Figure 8. Digital-to-Analog Glitch
Impulse Without Internal Deglitcher
(10 . . . 000 to 011 . . . 111 Transition)
1s/DIV
Figure 9. Digital-to-Analog Glitch
Impulse With Internal Deglitcher
(10 . . . 000 to 011 . . . 111 Transition)
Figure 10. Pulse Response
(Large Signal)
Figure 11. Pulse Response
(Small Signal)
Figure 12. Spectral Response of
Digitally Constructed Sine Wave
–6– REV. E

6 Page









AD7846 pdf, datenblatt
AD7846
A1A23
MC68000
DS
DTACK
R/W
ADDRESS BUS
ADDRESS
DECODE
CS
+5V CLR
LDAC
AD7846*
R/ W
D0D15
DATA BUS
DB0DB15
*LINEAR CIRCUITRY
OMITTED FOR CLARITY
Figure 25. AD7846-to-MC68000 Interface
DIGITAL FEEDTHROUGH
In the preceding interface configurations, most digital inputs to
the AD7846 are directly connected to the microprocessor bus.
Even when the device is not selected, these inputs will be con-
stantly changing. The high frequency logic activity on the bus
can feed through the DAC package capacitance to show up as
noise on the analog output. To minimize this Digital Feed-
through isolate the DAC from the noise source. Figure 26 shows
an interface circuit which isolates the DAC from the bus.
A1A15
ADDRESS BUS
MICRO-
PROCESSOR
ADDRESS
DECODE
CS
+5V CLR
LDAC
R/ W
R/ W
DIR G
AD7846*
D0D15
DATA BUS
B BUS A BUS
DB0DB15
*LINEAR CIRCUITRY
OMITTED FOR CLARITY
2؋
74LS245
Figure 26. AD7846 Interface Circuit Using Latches to Mini-
mize Digital Feedthrough
Note that to make use of the AD7846 readback feature using
the isolation technique of Figure 26, the latch needs to be
bidirectional.
APPLICATION HINTS
Noise
In high resolution systems, noise is often the limiting factor.
With a 10 volt span, a 16-bit LSB is 152 µV (–96 dB). Thus, the
noise floor must stay below –96 dB in the frequency range of
interest. Figure 7 shows the noise spectral density for the AD7846.
Grounding
As well as noise, the other prime consideration in high resolu-
tion DAC systems is grounding. With an LSB size of 152 µV
and a load current of 5 mA, 1 LSB of error can be introduced
by series resistance of only 0.03 .
Figure 27 below shows recommended grounding for the AD7846
in a typical application.
ANALOG SUPPLY
+15V 0V 15V
DIGITAL SUPPLY
+5V DGND
SIGNAL
GROUND
R1
R2
AD588*
R3
AD7846*
R4 VOUT
(+5V TO 5V)
RL
R5
*ADDITIONAL PINS
OMITTED FOR CLARITY
Figure 27. AD7846 Grounding
R1 to R5 represent lead and track resistances on the printed
circuit board. R1 is the resistance between the Analog Power
Supply ground and the Signal Ground. Since current flowing in
R1 is very low (bias current of AD588 sense amplifier), the
effect of R1 is negligible. R2 and R3 represent track resistance
between the AD588 outputs and the AD7846 reference inputs.
Because of the Force and Sense outputs on the AD588, these
resistances will also have a negligible effect on accuracy.
R4 is the resistance between the DAC output and the load. If
RL is constant, then R4 will introduce a gain error only which
can be trimmed out in the calibration cycle. R5 is the resistance
between the load and the analog common. If the output voltage
is sensed across the load, R5 will introduce a further gain error
which can be trimmed out. If, on the other hand, the output
voltage is sensed at the analog supply common, R5 appears as
part of the load and therefore introduces no errors.
Printed Circuit Board Layout
Figure 28 shows the AD7846 in a typical application with the
AD588 reference, producing an output analog voltage in the
± 10 volts range. Full scale and bipolar zero adjustment are
provided by potentiometers R2 and R3. Latches (2 × 74LS245)
isolate the DAC digital inputs from the active microprocessor
bus and minimize digital feedthrough.
The printed circuit board layout for Figure 28 is shown in Fig-
ures 29 and 30. Figure 29 is the component side layout while
Figure 30 is the solder side layout. The component overlay is
shown in Figure 31.
In the layout, the general grounding guidelines given in Figure
27 are followed. The AD588 and AD7846 are as close as pos-
sible, and the decoupling capacitors for these are also kept as
close to the device pins as possible.
–12–
REV. E

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