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PDF AD7823 Data sheet ( Hoja de datos )

Número de pieza AD7823
Descripción 2.7 V to 5.5 V/ 4.5 us/ 8-Bit ADC in 8-Lead microSOIC/DIP
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
8-Bit ADC with 4 s Conversion Time
Small Footprint 8-Lead microSOIC Package
Specified Over a –40؇C to +125؇C Temperature Range
Inherent Track-and-Hold Functionality
Operating Supply Range: 2.7 V to 5.5 V
Specifications at 2.7 V to 5.5 V and 5 V ؎ 10%
Microcontroller Compatible Serial Interface
Optional Automatic Power-Down
Low Power Operation:
570 W at 10 kSPS Throughput Rate
2.9 mW at 50 kSPS Throughput Rate
Analog Input Range: 0 V to VREF
Reference Input Range: 0 V to VDD
“Drop In” Upgrade to 10 Bits Available (AD7810)
APPLICATIONS
Low Power, Hand-Held Portable Applications
Requiring Analog-to-Digital Conversion
with 8-Bit Accuracy, e.g.,
Battery Powered Test Equipment
Battery Powered Communications Systems
2.7 V to 5.5 V, 4.5 s, 8-Bit
ADC in 8-Lead microSOIC/DIP
AD7823
FUNCTIONAL BLOCK DIAGRAM
VDD AGND
VREF
VIN+
VIN–
AD7823
CHARGE
REDISTRIBUTION
DAC
CLOCK
OSC
VDD/3
COMP
SERIAL
PORT
CONTROL
LOGIC
DOUT
SCLK
CONVST
GENERAL DESCRIPTION
The AD7823 is a high speed, low power, 8-bit A/D converter
that operates from a single 2.7 V to 5.5 V supply. The part con-
tains a 4 µs typ successive approximation A/D converter, inherent
track-and-hold functionality (with a pseudo differential input)
and a high speed serial interface that interfaces to most microcon-
trollers. The AD7823 is fully specified over a temperature range
of –40°C to +125°C.
By using a technique that samples the state of the CONVST
(convert start) signal at the end of a conversion, the AD7823
may be used in an automatic power-down mode. When used in
this mode, the AD7823 powers down automatically at the end
of a conversion and “wakes up” at the start of a new conversion.
This feature significantly reduces the power consumption of the
part at lower throughput rates. The AD7823 can also operate in
a high speed mode where the part is not powered down between
conversions. In this high speed mode of operation, the conver-
sion time of the AD7823 is 4 µs typ. The maximum throughput
rate is dependent on the speed of the serial interface of the
microcontroller.
The part is available in a small, 8-lead 0.3" wide, plastic dual-
in-line package (mini-DIP); in an 8-lead, small outline IC
(SOIC); and in an 8-lead microSOIC package.
PRODUCT HIGHLIGHTS
1. Complete, 8-Bit ADC in 8-Lead Package
The AD7823 is an 8-bit 4 µs ADC with inherent track-and-
hold functionality and a high speed serial interface—all in an
8-lead microSOIC package. VREF may be connected to VDD
to eliminate the need for an external reference. The result is
a high speed, low power, space saving ADC solution.
2. Low Power, Single Supply Operation
The AD7823 operates from a single +2.7 V to +5.5 V supply
and typically consumes only 9 mW of power. The power
dissipation can be significantly reduced at lower throughput
rates by using the automatic power-down mode, e.g., at a
throughput rate of 10 kSPS the power consumption is only
570 µW.
3. Automatic Power-Down
The automatic power-down mode, whereby the AD7823
“powers down” at the end of a conversion and “wakes up”
before the next conversion, means the AD7823 is ideal for
battery powered applications. See Power vs. Throughput
Rate section.
4. Serial Interface
An easy to use, fast serial interface allows connection to most
popular microprocessors with no external circuitry.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000

1 page




AD7823 pdf
AD7823
TERMINOLOGY
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal to (noise + distortion)
ratio for an ideal N-bit converter with a sine wave input is given
by:
Signal to (Noise + Distortion) = (6.02N + 1.76) dB
Thus for an 8-bit converter, this is 50 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7823 it is defined as:
THD (dB) = 20 log
V
2
2
+
V
2
3
+
V
2
4
+
V
2
5
+
V
2
6
V1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5 and V6 are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
parts where the harmonics are buried in the noise floor, it will
be a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for
which neither m nor n are equal to zero. For example, the
second order terms include (fa + fb) and (fa – fb), while the
third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
The AD7823 is tested using the CCIF standard where two
input frequencies near the top end of the input bandwidth are
used. In this case, the second and third order terms are of
different significance. The second order terms are usually
distanced in frequency from the original sine waves while the
third order terms are usually at a frequency close to the input
frequencies. As a result, the second and third order terms are
specified separately. The calculation of the intermodulation
distortion is as per the THD specification where it is the ratio of
the rms sum of the individual distortion products to the rms
amplitude of the fundamental expressed in dBs.
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
Differential Nonlinearity
This is the difference between the measured and the ideal
1 LSB change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (0000 . . . 000)
to (0000 . . . 001) from the ideal, i.e., AGND + 1 LSB.
Gain Error
This is the deviation of the last code transition (1111 . . . 110)
to (1111 . . . 111) from the ideal (i.e., VREF – 1 LSB) after the
offset error has been adjusted out.
Track/Hold Acquisition Time
Track/hold acquisition time is the time required for the output
of the track/hold amplifier to reach its final value, within
± 1/2 LSB, after the end of conversion (the point at which the
track/hold returns to track mode). It also applies to situations
where there is a step input change on the input voltage applied
to the VIN+ input of the AD7823. It means that the user must
wait for the duration of the track/hold acquisition time, after the
end of conversion or after a step input change to VIN, before
starting another conversion to ensure that the part operates to
specification.
Typical Performance Characteristics
10
0
0.1
0.01 0
10 20 30 40
THROUGHPUT kSPS
Figure 2. Power vs. Throughput
REV. B
50
–5–
0
10
20
30
40
50
60
70
80
90
100
AD7823
2048 POINT FFT
SAMPLING 136.054
FIN 29.961
FREQUENCY BINS
Figure 3. AD7823 SNR

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AD7823 arduino
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP
(N-8)
0.430 (10.92)
0.348 (8.84)
85
0.280 (7.11)
0.240 (6.10)
14
0.325 (8.25)
PIN 1
0.060 (1.52)
0.300 (7.62)
0.210 (5.33)
0.015 (0.38)
MAX
0.130
0.160 (4.06)
(3.30)
0.115 (2.93)
MIN
0.022 (0.558) 0.100 0.070 (1.77)
0.014 (0.356) (2.54) 0.045 (1.15)
SEATING
PLANE
BSC
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
8-Lead Small Outline Package
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
0.1574 (4.00)
0.1497 (3.80) 1
5
0.2440 (6.20)
4 0.2284 (5.80)
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.0688 (1.75)
0.0532 (1.35)
0.0196
0.0099
(0.50)
(0.25)
x
45؇
SEATING
PLANE
0.0500 0.0192 (0.49)
(1.27) 0.0138 (0.35)
BSC
0.0098 (0.25)
0.0075 (0.19)
8؇
0؇ 0.0500 (1.27)
0.0160 (0.41)
8-Lead microSOIC Package
(RM-8)
0.122 (3.10)
0.114 (2.90)
0.122 (3.10)
0.114 (2.90)
8
1
5
0.199 (5.05)
0.187 (4.75)
4
PIN 1
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
SEATING
PLANE
0.008 (0.20)
0.043 (1.09)
0.037 (0.94)
0.011 (0.28)
0.003 (0.08)
0.120 (3.05)
0.112 (2.84)
33؇
27؇
0.028 (0.71)
0.016 (0.41)
AD7823
REV. B
–11–

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