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PDF AD779 Data sheet ( Hoja de datos )
| Número de pieza | AD779 | |
| Descripción | 14-Bit 128 kSPS Complete Sampling ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
AC and DC Characterized and Specified (K, B, T
Grades)
128k Conversions per Second
1 MHz Full Power Bandwidth
500 kHz Full Linear Bandwidth
80 dB S/N+D (K, B, T Grades)
Twos Complement Data Format (Bipolar Mode)
Straight Binary Data Format (Unipolar Mode)
10 M⍀ Input Impedance
16-Bit Bus Interface (See AD679 for 8-Bit Interface)
Onboard Reference and Clock
10 V Unipolar or Bipolar Input Range
MIL-STD-883 Compliant Versions Available
14-Bit 128 kSPS
Complete Sampling ADC
AD779*
FUNCTIONAL BLOCK DIAGRAM
PRODUCT DESCRIPTION
The AD779 is a complete, multipurpose 14-bit monolithic
analog-to-digital converter, consisting of a sample-hold amplifier
(SHA), a microprocessor compatible bus interface, a voltage
reference and clock generation circuitry.
The AD779 is specified for ac (or “dynamic”) parameters such
as S/N+D ratio, THD and IMD which are important in signal
processing applications. In addition, the AD779K, B and T
grades are fully specified for dc parameters which are important
in measurement applications.
The 14 data bits are accessed by a 16-bit bus in a single read
operation. Data format is straight binary for unipolar mode and
twos complement binary for bipolar mode. The input has a full-
scale range of 10 V with a full power bandwidth of 1 MHz and a
full linear bandwidth of 500 kHz. High input impedance (10 MΩ)
allows direct connection to unbuffered sources without signal
degradation.
This product is fabricated on Analog Devices’ BiMOS process,
combining low power CMOS logic with high precision, low
noise bipolar circuits; laser-trimmed thin-film resistors provide
high accuracy. The converter utilizes a recursive subranging
algorithm which includes error correction and flash converter
circuitry to achieve high speed and resolution.
The AD779 operates from +5 V and ± 12 V supplies and
dissipates 560 mW (typ). Twenty-eight-pin plastic DIP and
ceramic DIP packages are available.
*Protected by U.S. Patent Numbers 4,804,960; 4,814,767; 4,833,345;
4,250,445; 4,808,908; RE30,586.
PRODUCT HIGHLIGHTS
l. COMPLETE INTEGRATION: The AD779 minimizes
external component requirements by combining a high speed
sample-hold amplifier (SHA), ADC, 5 V reference, clock
and digital interface on a single chip. This provides a fully
specified sampling A/D function unattainable with discrete
designs.
2. SPECIFICATIONS: The AD779K, B and T grades provide
fully specified and tested ac and dc parameters. The AD779J,
A and S grades are specified and tested for ac parameters; dc
accuracy specifications are shown as typicals. DC specifica-
tions (such as INL, gain and offset) are important in control
and measurement applications. AC specifications (such as
S/N+D ratio, THD and IMD) are of value in signal process-
ing applications.
3. EASE OF USE: The pinout is designed for easy board lay-
out, and the single cycle read output provides compatibility
with 16-bit buses. Factory trimming eliminates the need for
calibration modes or external trimming to achieve rated
performance.
4. RELIABILITY: The AD779 utilizes Analog Devices’
monolithic BiMOS technology. This ensures long term
reliability compared to multichip and hybrid designs.
5. The AD779 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD779/883B data sheet for detailed
specifications.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
ABSOLUTE MAXIMUM RATINGS1
Specification
With
Respect
To Min
Max
Units
VCC
VBE
VCC2
VDD
AGND
AGND –0.3 +18
AGND –18 +0.3
VEE –0.3 +26.4
DGND 0
+7
DGND –1 +1
V
V
V
V
V
AIN, REFIN
Digital Inputs
AGND VEE VCC
DGND –0.5 +7
V
V
Digital Outputs
Max Junction
DGND –0.5 VDD +0.3 V
Temperature
175 °C
Operating Temperature
J and K Grades
0 +70 °C
A and B Grades
–40 +85
°C
S and T Grades
–55 +125 °C
Storage Temperature
–65 +150 °C
Lead Temperature
(10 sec max)
+300 °C
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2The AD779 is not designed to operate from ± 15 V supplies.
AD779
ESD SENSITIVITY
The AD779 features input protection circuitry consisting of large “distributed” diodes and
polysilicon series resistors to dissipate both high energy discharges (Human Body Model) and fast,
low energy pulses (Charged Device Model). Per Method 3015.2 of MIL-STD-883C, the AD779
has been classified as a Category 1 device.
Proper ESD precautions are strongly recommended to avoid functional damage or performance
degradation. Charges as high as 4000 volts readily accumulate on the human body and test
equipment and discharge without detection. Unused devices must be stored in conductive foam or
shunts, and the foam should be discharged to the destination socket before devices are removed. For
further information on ESD precautions, refer to Analog Devices’ ESD Prevention Manual.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE1
Model2
Temperature Range Tested and Specified
Package Description
Package Option3
AD779JN
AD779KN
AD779JD
AD779KD
AD779AD
AD779BD
AD779SD
AD779TD
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
AC
AC + DC
AC
AC + DC
AC
AC + DC
AC
AC + DC
28-Pin Plastic DIP
28-Pin Plastic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
N-28
N-28
D-28
D-28
D-28
D-28
D-28
D-28
NOTES
1For two cycle read (8+16 bits) interface to 8-bit buses, see AD679.
2For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current
AD779/883B data sheet.
3D = Ceramic DIP; N = Plastic DIP.
REV. B
–5–
5 Page 
AD779
AD779 TO 80186
Figure 10 shows the AD779 interfaced to the 80186 micropro-
cessor. This interface allows the 80186’s built-in DMA control-
ler to transfer the AD779 output into a RAM based FIFO buffer
of any length, with no microprocessor intervention.
execution in one 80 ns cycle, the digital signal processor will
support the AD779 data memory interface with two wait states.
The converter runs asychronously using a sampling clock. The
EOC output to the AD779 gets asserted at the end of each
conversion and causes an interrupt. Upon interrupt, the ADSP-
2100A starts a data memory read by providing an address on
the DMA bus. The decoded address generates OE for the
converter. OE, together with logic and latch, is used to force the
ADSP-2100A into a one cycle wait state by generating
DMACK. The read operation is thus started and completed
within two processor cycles (160 ns).
Figure 10. AD779 to 80186 DMA Interface
AD779 TO Z80
The AD779 can be interfaced to the Z80 processor in an I/O or
memory mapped configuration. Figure 11 illustrates an I/O con-
figuration, where the AD779 occupies several port addresses to
allow separate polling of the EOC status and reading of the data.
Figure 12. AD779 to ADSP-2100A Interface
Figure 11. AD779 to Z80 Interface
A useful feature of the Z80 is that a single wait state is automati-
cally inserted during I/O operations, allowing the AD779 to be
used with Z80 processors having clock speeds up to 8 MHz.
The AD779 is asynchronous which allows conversions to be ini-
tiated by an external trigger source independent of the micro-
processor clock. After each conversion, the AD779 EOC signal
generates a DMA request to Channel 1 (DRQ1). The subse-
quent DMA READ resets the interrupt latch. The system de-
signer must assign a sufficient priority to the DMA channel to
ensure that the DMA request will be serviced before the com-
pletion of the next conversion. This configuration can be used
with 6 MHz and 8 MHz 80186 processors.
Figure 13. Harmonic Distortion vs. Input Frequency
(0.5 dB Input)
AD779 TO ANALOG DEVICES ADSP-2100A
Figure 12 demonstrates the AD779 interfaced to an ADSP-
2100A. With a clock frequency of 12.5 MHz, and instruction
REV. B
Figure 14. Total Harmonic Distortion vs. Input Frequency
and Amplitude
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD779.PDF ] | |
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