PDF AD7724 Data sheet ( Hoja de datos )

Número de pieza	AD7724
Descripción	Dual CMOS Modulators
Fabricantes	Analog Devices
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No Preview Available ! a Dual CMOS ⌺-⌬ Modulators AD7724 FEATURES 13 MHz Master Clock Frequency 0 V to +2.5 V or ؎1.25 V Input Range Single Bit Output Stream 90 dB Dynamic Range Power Supplies AVDD, DVDD: 5 V␣ ؎ 5% DVDD1: 3 V ؎ 5% Logic Outputs 3 V/5 V Compatible On-Chip 2.5 V Voltage Reference 48-Lead LQFP GENERAL DESCRIPTION This device consists of two seventh order sigma-delta modula- tors. Each modulator converts its analog input signal into a high speed 1-bit data stream. The part operates from a 5 V power supply and accepts a differential input range of 0 V to +2.5 V or ±1.25 V centered about a common-mode bias. The analog inputs are continuously sampled by the analog modulators, eliminating the need for external sample-and-hold circuitry. The input infor- mation is contained in the output stream as a density of ones. The original information can be digitally reconstructed with an appropriate digital filter. The part provides an accurate on-chip 2.5 V reference for each modulator. A reference input/output function is provided to allow either the internal reference or an external system refer- ence to be used as the reference source for the modulator. The device is offered in a 48-lead LQFP package and designed to operate from –40°C to +85°C. FUNCTIONAL BLOCK DIAGRAM REF1 REF2A REF2B 2.5V REFERENCE AD7724 AVIN(+) AVIN(–) BVIN(+) BVIN(–) MZERO GC BIP STBY RESET ⌺-⌬ MODULATOR A ⌺-⌬ MODULATOR B CONTROL LOGIC CLOCK CIRCUITRY ADATA SCLK BDATA XTAL OFF XTAL1 XTAL2/MCLK DVAL DVDD DVDD1 DGND AVDD AGND REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 1 page ABSOLUTE MAXIMUM RATINGS* (TA = 25°C unless otherwise noted) DVDD to DGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V AVDD to AGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V AVDD to DVDD . . . . . . . . . . . . . . . . . . . . . . . –1 V to +1 V AGND to DGND . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V Digital Inputs to DGND . . . . . . . . –0.3 V to DVDD + 0.3 V Digital Outputs to DGND . . . . . . . –0.3 V to DVDD + 0.3 V VIN(+), VIN(–) to AGND . . . . . . . –0.3 V to AVDD + 0.3 V REF1 to AGND . . . . . . . . . . . . . . . –0.3 V to AVDD + 0.3 V REF2 to AGND . . . . . . . . . . . . . . . –0.3 V to AVDD + 0.3 V REFIN to AGND . . . . . . . . . . . . . . –0.3 V to AVDD + 0.3 V Operating Temperature Range . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . 75°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. AD7724 PIN CONFIGURATION 48 47 46 45 44 43 42 41 40 39 38 37 AVDD 1 AGND 2 AVIN(–) 3 NC 4 AVIN(+) 5 AGND 6 AVDD 7 NC 8 STBY 9 MZERO 10 RESET 11 NC 12 PIN 1 IDENTIFIER AD7724 TOP VIEW (Not to Scale) 36 AVDD 35 AGND 34 BVIN(–) 33 NC 32 BVIN(+) 31 AGND 30 AVDD 29 NC 28 GC 27 BIP 26 XTAL_OFF 25 NC NC = NO CONNECT 13 14 15 16 17 18 19 20 21 22 23 24 Model AD7724AST Temperature Range –40°C to +85°C ORDERING GUIDE Package Description 48-Lead Plastic Thin Quad Flatpack (LQFP) Package Option ST-48 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7724 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. A –5– 5 Page An alternative circuit configuration for driving the differential inputs to the AD7724 is shown in Figure 24. R 100⍀ R 100⍀ C 2.7nF C 2.7nF C 2.7nF VIN(+) VIN(–) Figure 24. Differential Input with Antialiasing A capacitor between the two input pins sources or sinks charge to allow most of the charge needed by one input to be effectively supplied by the other input. This minimizes undesirable charge transfer from the analog inputs to and from ground. The series resistor isolates the operational amplifier from the current spikes created during the sampling process and provides a pole for antialiasing. The 3 dB cutoff frequency of the antialias filter is given by Equation 1, and the attenuation of the filter is given by Equation 2. f3␣ dB = 1/(2␣ π REXT CEXT) (1)  2 ( )Attenuation = 20 log 1/ 1+ f / f 3dB  (2) The choice of the filter cutoff frequency will depend on the amount of roll-off that is acceptable in the passband of the digi- tal filter and the required attenuation at the first image frequency. The capacitors used for the input antialiasing circuit must have low dielectric absorption to avoid distortion. Film capacitors such as polypropylene or polycarbonate are suitable. If ceramic capacitors are used, they must have NPO dielectric. Applying the Reference The reference circuitry used in the AD7724 includes an on-chip 2.5 V bandgap reference and a reference buffer circuit. The block diagram of the reference circuit is shown in Figure 25. The internal reference voltage is connected to REF1 via a 3 kΩ resistor and is internally buffered to drive the analog modulator’s switched capacitor DAC (REF2). When using the internal refer- ence, connect 110 nF between REF1 and AGND. If the internal reference is required to bias external circuits, use an external precision op amp to buffer REF1. AD7724 The AD7724 can operate with its internal reference, or an external reference can be applied in two ways. An external reference can be connected to REF1, overdriving the internal reference. However, an error will be introduced due to the offset of the internal buffer amplifier. For lowest system gain errors when using an external reference, REF1 is grounded (disabling the internal buffer) and the external reference is con- nected to REF2. In all cases, since the REF2 voltage connects to the analog modu- lator, a 110 nF capacitor must connect directly from REF2 to AGND. The external capacitor provides the charge required for the dynamic load presented at the REF2 pin (Figure 26). REF2 110nF ␾A 4pF ␾B 4pF ␾B ␾A SWITCHED-CAP DAC REF MCLK ␾A ␾B ␾A ␾B Figure 26. REF2 Equivalent Circuit The AD780 is ideal to use as an external reference with the AD7724. Figure 27 shows a suggested connection diagram. 5V 1␮F 22nF 1 NC O/P SELECT 8 2 +VIN NC 7 3 TEMP VOUT 6 4 GND TRIM 5 110nF 22␮F REF2 REF1 AD780 NC = NO CONNECT Figure 27. External Reference Circuit Connection 1V REF1 110nF REF2 COMPARATOR REFERENCE BUFFER 4k⍀ 2.5V REFERENCE SWITCHED-CAP DAC REF Figure 25. Reference Circuit Block Diagram REV. A –11– 11 Page

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