Datenblatt-pdf.com


AD9500 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD9500
Beschreibung Digitally Programmable Delay Generator
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 11 Seiten
AD9500 Datasheet, Funktion
a
Digitally Programmable
Delay Generator
AD9500
FEATURES
10 ps Delay Resolution
2.5 ns to 10 s Full-Scale Range
Fully Differential Inputs
Separate Trigger and Reset Inputs
Low Power Dissipation—310 mW
MIL-STD-883 Compliant Versions Available
APPLICATIONS
ATE
Pulse Deskewing
Arbitrary Waveform Generators
High Stability Timing Source
Multiple Phase Clock Generators
GENERAL DESCRIPTION
The AD9500 is a digitally programmable delay generator, which
provides programmed delays, selected through an 8-bit digital
code, in resolutions as small as 10 ps. The AD9500 is con-
structed in a high performance bipolar process, designed to
provide high speed operation for both digital and analog circuits.
The AD9500 employs differential TRIGGER and RESET
inputs which are designed primarily for ECL signal levels but
function with analog and TTL input levels. An onboard ECL
reference midpoint allows both of the inputs to be driven by
either single ended or differential ECL circuits. The AD9500
output is a complementary ECL stage, which also provides a Q
R
parallel output circuit to facilitate reset timing implementations.
The digital control data is passed to the AD9500 through a
transparent latch controlled by the LATCH ENABLE signal. In
the transparent mode, the internal DAC of the AD9500 will
attempt to follow changes at the inputs. The LATCH ENABLE
is otherwise used to strobe the digital data into the AD9500
latches.
The AD9500 is available as an industrial temperature range
device, –25°C to +85°C, and as an extended temperature range
device, –55°C to +125°C. Both grades are packaged in a 24-lead
cerdip (0.3" package width), as well as 28-leaded and leadless
surface mount packages. The AD9500 is available in versions
compliant with MIL-STD-883. Refer to the Analog Devices
Military Products Databook or current AD9500/883B data
sheet for detailed specifications.
FUNCTIONAL BLOCK DIAGRAM
TRIGGER
TRIGGER
RESET
RESET
DIFFERENTIAL
ANALOG
INPUT
STAGE
+VS
CEXT
CS
ECL COMMON
AD9500
TIMING
CONTROL
CIRCUIT
Q
ECLREF
RS
RSET
–VS
ECL
VOLTAGE
REFERENCE
REFERENCE
CURRENT
INTERNAL DAC
TTL LATCHES
Q
QR
–VS GROUND D0 D1 D2 D3 D4 D5 D6 D7 LATCH OFFSET
(LSB)
(MSB) ENABLE ADJUST
PIN CONFIGURATIONS
D4 1
D5 2
D6 3
D7 (MSB) 4
ECLREF 5
OFFSET ADJUST 6
CS 7
+VS 8
TRIGGER 9
TRIGGER 10
RESET 11
RESET 12
AD9500
TOP VIEW
(Not to Scale)
24 D3
23 D2
22 D1
21 D0 (LSB)
20 LATCH ENABLE
19 GROUND
18 RS
17 –VS
16 ECL COMMON
15 QR
14 Q
13 Q
4 3 2 1 28 27 26
D7 (MSB) 5
ECLREF 6
OFFSET ADJUST 7
NC 8
CS 9
+VS 10
TRIGGER 11
AD9500
TOP VIEW
(Not to Scale)
25 D0 (LSB)
24 LATCH ENABLE
23 GROUND
22 NC
21 RS
20 –VS
19 ECL COMMON
12 13 14 15 16 17 18
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
NC = NO CONNECT
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999






AD9500 Datasheet, Funktion
AD9500
Figure 2. Input/Output Circuits
–6– REV. D

6 Page







SeitenGesamt 11 Seiten
PDF Download[ AD9500 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
AD9500Digitally Programmable Delay GeneratorAnalog Devices
Analog Devices
AD9501Digitally Programmable Delay GeneratorAnalog Devices
Analog Devices
AD9502Hybrid RS-170 Video DigitizerAnalog Devices
Analog Devices
AD95081.65 GHz Clock Fanout BufferAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche