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AD8561 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD8561
Beschreibung Ultrafast 7 ns Single Supply Comparator
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 13 Seiten
AD8561 Datasheet, Funktion
a
FEATURES
7 ns Propagation Delay at 5 V
Single Supply Operation: 3 V to 10 V
Low Power
Latch Function
TSSOP Packages
APPLICATIONS
High Speed Timing
Clock Recovery and Clock Distribution
Line Receivers
Digital Communications
Phase Detectors
High Speed Sampling
Read Channel Detection
PCMCIA Cards
Upgrade for LT1016 Designs
GENERAL DESCRIPTION
The AD8561 is a single 7 ns comparator with separate input and
output sections. Separate supplies enable the input stage to be
operated from ± 5 V dual supplies and +5 V single supplies.
Fast 7 ns propagation delay makes the AD8561 a good choice
for timing circuits and line receivers. Propagation delays for
rising and falling signals are closely matched and track over
temperature. This matched delay makes the AD8561 a good
choice for clock recovery, since the duty cycle of the output will
match the duty cycle of the input.
The AD8561 has the same pinout as the LT1016, with lower
supply current and a wider common-mode input range, which
includes the negative supply rail.
The AD8561 is specified over the industrial (–40°C to +85°C)
temperature range. The AD8561 is available in both the 8-lead
plastic DIP, 8-lead TSSOP or narrow SO-8 surface mount
packages.
Ultrafast 7 ns
Single Supply Comparator
AD8561
PIN CONFIGURATIONS
8-Lead Narrow Body SO
(SO-8)
8-Lead Plastic DIP
(N-8)
V؉
؉IN
؊IN
V؊
OUT
OUT
GND
LATCH
AD8561
V؉ 1
؉IN 2
؊IN 3
V؊ 4
AD8561
8 OUT
7 OUT
6 GND
5 LATCH
8-Lead TSSOP
(RU-8)
V؉ 1
8
؉IN
؊IN
AD8561
V؊ 4
5
OUT
OUT
GND
LATCH
Rev. C
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700 ©1998–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD8561 Datasheet, Funktion
AD8561
Typical Performance Characteristics (V+ = +5 V, V– = 0 V, TA = +25؇C unless otherwise noted)
5
+125؇C
4
VS = 5V, SINGLE SUPPLY
–40؇C
3
+25؇C
2
500
400
300
200
20
VS = 5V, SINGLE SUPPLY
STEP SIZE = 100mV
CAPACITANCE LOAD = 10pF
15
TA = +25؇C
10
1 100
5
0
–2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5
DIFFERENTIAL INPUT VOLTAGE – mV
Figure 1. Output Voltage vs. Differen-
tial Input Voltage
0
–5 –4 –3 –2 –1 0 1 2 3 4 5
INPUT VOLTAGE – mV
Figure 2. Typical Distribution of Input
Offset Voltage
0
0
10
20 30
40
50
OVERDRIVE – mV
Figure 3. Propagation Delay vs.
Overdrive
20
VS = 5V, SINGLE SUPPLY
STEP SIZE = 100mV
OVERDRIVE LOAD = 5mV
15
tPD
FALLING EDGE
10
tPD +
FALLING EDGE
5
0
0 10 20 30 40 50
LOAD CAPACITANCE – pF
Figure 4. Propagation Delay vs. Load
Capacitance
40
VS = 5V, SINGLE SUPPLY
OVERDRIVE = 10mV
TA = +25؇C
CAPACITANCE LOAD = 10pF
30
STEP SIZE = 800mV
20
400mV
200mV
100mV
10
20
SINGLE SUPPLY,
STEP SIZE = 100mV
TA = +25؇C
15 OVERDRIVE = 5mV
CAPACITANCE LOAD = 10pF
10
5
0
0 0.5 1 1.5 2
SOURCE RESISTANCE – k
Figure 5. Propagation Delay vs.
Source Resistance
0
4.5
4.75 5 5.25
SUPPLY VOLTAGE – Volts
5.5
Figure 6. Propagation Delay vs. Posi-
tive Supply Voltage
20
VS = +5V, SINGLE SUPPLY
STEP SIZE = 100mV
15 OVERDRIVE = 5mV,
LOAD CAPACITANCE = 10pF
10
5
0
–50 –25
0 25 50 75 100 125
TEMPERATURE – ؇C
Figure 7. Propagation Delay vs.
Temperature
20
+25؇C
15
–40؇C
+125؇C
10
5 VS = 5V
STEP SIZE = 100mV
OVERDRIVE = 5mV
LOAD CAPACITANCE = 10pF
0
0
1
23
4
COMMON-MODE VOLTAGE – Volts
5
Figure 8. Propagation Delay vs. VCM
4
3
2 HOLD TIME
1
SET-UP TIME
0
–50 –25
0 25 50 75
TEMPERATURE – ؇C
100 125
Figure 9. Latch Setup-and-Hold Time
vs. Temperature
Rev. C
–5–

6 Page









AD8561 pdf, datenblatt
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
85
14
0.210 (5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.100 (2.54)
BSC
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.060 (1.52)
MAX
0.015
(0.38)
MIN
SEATING
PLANE
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 18. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
AD8561
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
8
1
5
6.20 (0.2441)
4 5.80 (0.2284)
0.25 (0.0098)
0.10 (0.0040)
1.27 (0.0500)
BSC
1.75 (0.0688)
1.35 (0.0532)
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196) 45°
0.25 (0.0099)
1.27 (0.0500)
0.25 (0.0098) 0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 19. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body(R-8)
Dimensions shown in millimeters and (inches)
3.10
3.00
2.90
85
4.50
4.40 6.40 BSC
4.30
14
PIN 1
0.65 BSC
0.15
0.05
1.20
MAX
COPLANARITY 0.30 SEATING 0.20
0.10 0.19 PLANE 0.09
COMPLIANT TO JEDEC STANDARDS MO-153-AA
0.75
0.60
0.45
Figure 20. 8-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-8)
Dimensions shown in millimeters
Rev. C | Page 11 of 12

12 Page





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