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PDF AD8522 Data sheet ( Hoja de datos )

Número de pieza AD8522
Descripción +5 Volt/ Serial Input/ Dual 12-Bit DAC
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
Complete Dual 12-Bit DAC
No External Components
+5 V Single-Supply Operation ؎10%
4.095 V Full Scale (1 mV/LSB)
Buffered Voltage Outputs
Low Power: 5 mW/DAC
Space Saving 1.5 mm Height SO-14 Package
APPLICATIONS
Digitally Controlled Calibration
Servo Controls
Process Control Equipment
Computer Peripherals
Portable Instrumentation
Cellular Base Stations Voltage Adjustment
+5 Volt, Serial Input,
Dual 12-Bit DAC
AD8522
FUNCTIONAL BLOCK DIAGRAM
VDD
CS
CLK
CLK
LATCH
SDI
(DATA)
SHIFT
REGISTER
DAC A
REGISTER
D
12
DAC A
12
BANDGAP
REFERENCE
OP
AMP
A
REF
BUF
SDO
LDA
LDB
CONTROL
LOGIC
D
DAC B
REGISTER
12
REF
BUF
DAC B
AD8522
OP
AMP
B
DGND
MSB RS
AGND
VOUTA
VREF
VOUTB
GENERAL DESCRIPTION
The AD8522 is a complete dual 12-bit, single-supply, voltage
output DAC in a 14-pin DIP, or SO-14 surface mount package.
Fabricated in a CBCMOS process, features include a serial digi-
tal interface, onboard reference, and buffered voltage output.
Ideal for +5 V-only systems, this monolithic device offers low
cost and ease of use, and requires no external components to
realize the full performance of the device.
The serial digital interface allows interfacing directly to numer-
ous microcontroller ports, with a simple high speed, three-wire
data, clock, and load strobe format. The 16-bit serial word con-
tains the 12-bit data word and DAC select address, which is de-
coded internally or can be decoded externally using LDA, LDB
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
VDD = +4.5V
TA = –55°C, +25°C, +85°C, +125°C
+25°C
–55°C
+85°C
+125°C
1024
2048
3072
4096
DIGITAL INPUT CODE – Decimal
Figure 1. Linearity Error vs. Digital Code & Temperature
inputs. A serial data output allows the user to easily daisy-chain
multiple devices in conjunction with a chip select input. A reset
RS input sets the outputs to zero scale or midscale, as deter-
mined by the input MSB.
The output 4.095 V full scale is laser trimmed to maintain accu-
racy over the operating temperature range of the device, and
gives the user an easy-to-use one-millivolt-per-bit resolution. A
2.5 V reference output is also available externally for other data
acquisition circuitry, and for ratiometric applications. The out-
put buffers are capable of driving ± 5 mA.
The AD8522 is available in the 14-pin plastic DIP and low pro-
file 1.5 mm SOIC-14 packages.
PACKAGE TYPES AVAILABLE
SO-14
PDIP-14
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703

1 page




AD8522 pdf
AD8522
OPERATION
The AD8522 is a complete ready-to-use dual 12-bit digital-to-
analog converter. Only one +5 V power supply is necessary for
operation. It contains two voltage-switched, 12-bit, laser-
trimmed digital-to-analog converters, a curvature-corrected
bandgap reference, rail-to-rail output op amps, input registers,
and DAC registers. The serial data interface consists of a serial
data input (SDI), clock (CLK), and two load strobe pins (LDA,
LDB) with an active low CS strobe. In addition, an asynchro-
nous RS pin will set all DAC register bits to zero causing the
VOUT to become zero volts, or to midscale for trimming applica-
tions when the MSB pin is programmed to Logic 1. This func-
tion is useful for power on reset or system failure recovery to a
known state.
D/A CONVERTER SECTION
The internal DAC is a 12-bit voltage-mode device with an out-
put that swings from AGND potential to the 2.5 V internal
bandgap voltage. It uses a laser-trimmed R-2R ladder which is
switched by N channel MOSFETs. The output voltage of the
DAC has a constant resistance independent of digital input
code. The DAC output is internally connected to the rail-to-rail
output op amp.
AMPLIFIER SECTION
The internal DAC’s output is buffered by a low power con-
sumption precision amplifier. This low power amplifier contains
a differential PNP pair input stage that provides low offset volt-
age and low noise, as well as the ability to amplify the zero-scale
DAC output voltages. The rail-to-rail amplifier is configured in
a gain of 1.638 (= 4.095 V/2.5 V) in order to set the 4.095 V
full-scale output (1 mV/LSB). See Figure 4 for an equivalent
circuit schematic of the analog section.
BANDGAP
REFERENCE
VREF
2.5V
VOLTAGE SWITCHED 12-BIT
R-2R D/A CONVERTER
2R
BUFFER
R
2R
R
2R
RAIL-TO-RAIL
OUTPUT
AMPLIFIER
VOUT
R2
R1
SPDT
N CH FET
SWITCHES
2R
2R
AV = 4.096/2.5
= 1.638V/V
Figure 4. Equivalent AD8522 Schematic of Analog Portion
The op amp has a 16 µs typical settling time to 0.01%. There
are slight differences in settling time for negative slewing signals
versus positive. See the oscilloscope photos in the “Typical Per-
formance Characteristics” section of this data sheet.
OUTPUT SECTION
The rail-to-rail output stage of this amplifier has been designed
to provide precision performance while operating near either
power supply. Figure 5 shows an equivalent output schematic of
the rail-to-rail amplifier with its N channel pull-down FETs that
will pull an output load directly to GND. The output sourcing
current is provided by a P channel pull-up device that can sup-
ply GND terminated loads, especially important at the –10%
supply tolerance value of 4.5 V.
P-CH
N-CH
VDD
VOUT
AGND
Figure 5. Equivalent Analog Output Circuit
Figures 6 and 7 in the typical performance characteristics sec-
tion provide information on output swing performance near
ground and full scale as a function of load. In addition to resis-
tive load driving capability the amplifier has also been carefully
designed and characterized for up to 500 pF capacitive load
driving capability.
REFERENCE SECTION
The internal 2.5 V curvature-corrected bandgap voltage refer-
ence is laser trimmed for both initial accuracy and low tempera-
ture coefficient. The voltage generated by the reference is
available at the VREF pin. Since VREF is not intended to drive
heavy external loads, it must be buffered. The equivalent emit-
ter follower output circuit of the VREF pin is shown in Figure 4.
Bypassing the VREF pin will improve noise performance; how-
ever, bypassing is not required for proper operation. Figure 10
shows broad band noise performance.
POWER SUPPLY
The very low power consumption of the AD8522 is a direct
result of a circuit design optimizing use of a CBCMOS process.
By using the low power characteristics of the CMOS for the
logic, and the low noise, tight matching of the complementary
bipolar transistors good analog accuracy is achieved.
For power consumption sensitive applications it is important to
note that the internal power consumption of the AD8522 is
strongly dependent on the actual input voltage levels present on
the SDI, CLK, CS, MSB, LDA, LDB and RS pins. Since these in-
puts are standard CMOS logic structures, they contribute static
power dissipation dependent on the actual driving logic VOH and
VOL voltage levels. Consequently for optimum dissipation use of
CMOS logic versus TTL provides minimal dissipation in the static
state. A VINL = 0 V on the logic input pins provides the lowest
standby dissipation of 1 mA with a +5 V power supply.
As with any analog system, it is recommended that the AD8522
power supply be bypassed on the same PC card that contains
the chip. Figure 12 shows the power supply rejection versus fre-
quency performance. This should be taken into account when
using higher frequency switched-mode power supplies with
ripple frequencies of 100 kHz and higher.
One advantage of the rail-to-rail output amplifiers used in the
AD8522 is the wide range of usable supply voltage. The part is
fully specified and tested over temperature for operation from
+4.5 V to +5.5 V. If reduced linearity and source current capa-
bility near full scale can be tolerated, operation of the AD8522
REV. A
–5–

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