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PDF AD8346 Data sheet ( Hoja de datos )
| Número de pieza | AD8346 | |
| Descripción | 0.8 GHz-2.5 GHz Quadrature Modulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
High accuracy
1 degree rms quadrature error @ 1.9 GHz
0.2 dB I/Q amplitude balance @ 1.9 GHz
Broad frequency range: 0.8 GHz to 2.5 GHz
Sideband suppression: −46 dBc @ 0.8 GHz
Sideband suppression: −36 dBc @ 1.9 GHz
Modulation bandwidth: dc to 70 MHz
0 dBm output compression level @ 0.8 GHz
Noise floor: −147 dBm/Hz
Single 2.7 V to 5.5 V supply
Quiescent operating current: 45 mA
Standby current: 1 μA
16-lead TSSOP
APPLICATIONS
Digital and spread spectrum communication systems
Cellular/PCS/ISM transceivers
Wireless LAN/wireless local loop
QPSK/GMSK/QAM modulators
Single-sideband (SSB) modulators
Frequency synthesizers
Image reject mixer
GENERAL DESCRIPTION
The AD8346 is a silicon RFIC I/Q modulator for use from
0.8 GHz to 2.5 GHz. Its excellent phase accuracy and amplitude
balance allow high performance direct modulation to RF.
The differential LO input is applied to a polyphase network
phase splitter that provides accurate phase quadrature from
0.8 GHz to 2.5 GHz. Buffer amplifiers are inserted between
two sections of the phase splitter to improve the signal-to-
noise ratio. The I and Q outputs of the phase splitter drive the
LO inputs of two Gilbert-cell mixers. Two differential V-to-I
converters connected to the baseband inputs provide the
baseband modulation signals for the mixers. The outputs of
the two mixers are summed together at an amplifier which is
designed to drive a 50 Ω load.
0.8 GHz to 2.5 GHz
Quadrature Modulator
AD8346
FUNCTIONAL BLOCK DIAGRAM
IBBP 1
IBBN 2
COM1 3
COM1 4
LOIN 5
LOIP 6
VPS1 7
ENBL 8
PHASE
SPLITTER
BIAS
AD8346
16 QBBP
15 QBBN
14 COM4
13 COM4
12 VPS2
11 VOUT
10 COM3
9 COM2
Figure 1.
This quadrature modulator can be used as the transmit mod-
ulator in digital systems such as PCS, DCS, GSM, CDMA, and
ISM transceivers. The baseband quadrature inputs are directly
modulated by the LO signal to produce various QPSK and
QAM formats at the RF output.
Additionally, this quadrature modulator can be used with direct
digital synthesizers in hybrid phase-locked loops to generate
signals over a wide frequency range with millihertz resolution.
The AD8346 comes in a 16-lead TSSOP package, measuring
6.5 mm × 5.1 mm × 1.1 mm. It is specified to operate over a
−40°C to +85°C temperature range and a 2.7 V to 5.5 V supply
voltage range. The device is fabricated on Analog Devices’ high
performance 25 GHz bipolar silicon process.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD8346
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage VPS1, VPS2
Input Power LOIP, LOIN (relative to 50 Ω)
Min Input Voltage IBBP, IBBN, QBBP, QBBN
Max Input Voltage IBBP, IBBN, QBBP, QBBN
Internal Power Dissipation
θJA
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
Min Rating
5.5 V
10 dBm
0V
2.5 V
500 mW
125°C/W
−40°C to +85°C
−65°C to +150°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 4 of 20
5 Page 
AD8346
CIRCUIT DESCRIPTION
OVERVIEW
The AD8346 can be divided into the following sections: local
oscillator (LO) interface, mixer, voltage-to-current (V-to-I)
converter, differential-to-single-ended (D-to-S) converter, and
bias. A detailed block diagram of the part is shown in Figure 25.
The LO interface generates two LO signals, with 90° of phase
difference between them, to drive two mixers in quadrature.
Baseband voltage signals are converted into current form in
the V-to-I converters, feeding into two mixers. The output of
the mixers are combined to feed the D-to-S converter which
provides the 50 Ω output interface. Bias currents to each
section are controlled by the Enable (ENBL) signal. Detailed
descriptions of each section follows.
LO INTERFACE
The differential LO inputs allow the user to drive the LO differ-
entially in order to achieve maximum performance. The LO can
be driven single-endedly but the LO feedthrough performance
is degraded, especially towards the higher end of the frequency
range. The LO interface consists of interleaved stages of
polyphase network phase splitters and buffer amplifiers. The
phase-splitter contains resistors and capacitors connected in a
circular manner to split the LO signal into I and Q paths in
precise quadrature with each other. The signal on each path
goes through a buffer amplifier to make up for the loss and high
frequency roll-off. The two signals then go through another
polyphase network to enhance the quadrature accuracy. The
broad operating frequency range of 0.8 GHz to 2.5 GHz is
achieved by staggering the RC time constants in each stage of
the phase-splitters. The outputs of the second phase-splitter are
fed into the driver amplifiers for the mixers’ LO inputs.
IBBP
V-TO-I CONVERTER
Each baseband input pin is connected to an op amp driving an
emitter follower. Feedback at the emitter maintains a current
proportional to the input voltage through the transistor. This
current is fed to the two mixers in differential form.
MIXERS
There are two double-balanced mixers, one for the in-phase
channel (I-channel) and one for the quadrature channel
(Q channel). Each mixer uses the gilbert cell design with four
cross-connected transistors. The bases of the transistors are
driven by the LO signal of the corresponding channel. The
output currents from the two mixers are summed together in
two resistors in series with two coupled on-chip inductors. The
signal developed across the R-L loads is sent to the D-to-S stage.
DIFFERENTIAL-TO-SINGLE-ENDED CONVERTER
The differential-to-single-ended converter consists of two
emitter followers driving a totem-pole output stage. Output
impedance is established by the emitter resistors in the output
transistors. The output of this stage is connected to the output
(VOUT) pin.
BIAS
A band gap reference circuit based on the Δ-VBE principle
generates the proportional-to-absolute-temperature (PTAT)
currents used by the different sections as references. The band
gap voltage is also used to generate a temperature-stable current
in the V-to-I converters to produce a temperature-independent
slew rate. When the band gap reference is disabled by pulling
down the ENBL pin, all other sections are shut off accordingly.
IBBN
AD8346
V-TO-I
V-TO-I
LOIN
LOIP
PHASE
SPLITTER
1
PHASE
SPLITTER
2
MIXER
D-TO-S
VOUT
MIXER
ENBL
BIAS CELL
V-TO-I
V-TO-I
QBBP
Figure 25. Detailed Block Diagram
Rev. A | Page 10 of 20
QBBN
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD8346.PDF ] | |
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