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PDF AD8314 Data sheet ( Hoja de datos )
| Número de pieza | AD8314 | |
| Descripción | RF Detector/Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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100 MHz to 2.7 GHz, 45 dB
RF Detector/Controller
AD8314
FEATURES
Complete RF detector/controller function
Typical range:−58 dBV to −13 dBV
−45 dBm to 0 dBm, re 50 Ω
Frequency response from 100 MHz to 2.7 GHz
Temperature-stable linear-in-dB response
Accurate to 2.7 GHz
Rapid response: 70 ns to a 10 dB step
Low power: 12 mW at 2.7 V
Power down to 20 μA
APPLICATIONS
Cellular handsets (TDMA, CDMA , GSM)
RSSI and TSSI for wireless terminal devices
Transmitter power measurement and control
GENERAL DESCRIPTION
The AD8314 is a complete low cost subsystem for the
measurement and control of RF signals in the frequency range
of 100 MHz to 2.7 GHz, with a typical dynamic range of 45 dB,
intended for use in a wide variety of cellular handsets and other
wireless devices. It provides a wider dynamic range and better
accuracy than possible using discrete diode detectors. In
particular, its temperature stability is excellent over the full
operating range of −40°C to +85°C.
Its high sensitivity allows control at low power levels, thus
reducing the amount of power that needs to be coupled to the
detector. It is essentially a voltage-responding device, with a
typical signal range of 1.25 mV to 224 mV rms or –58 dBV to
−13 dBV. This is equivalent to −45 dBm to 0 dBm, re 50 Ω.
For convenience, the signal is internally ac-coupled, using a
5 pF capacitor to a load of 3 kΩ in shunt with 2 pF. This high-
pass coupling, with a corner at approximately 16 MHz,
determines the lowest operating frequency. Therefore, the
source can be dc grounded.
The AD8314 provides two voltage outputs. The first, V_UP,
increases from close to ground to about 1.2 V as the input signal
level increases from 1.25 mV to 224 mV. This output is intended
for use in measurement mode. Consult the Applications section
for information on this mode. A capacitor can be connected
between the V_UP and FLTR pins when it is desirable to
increase the time interval over which averaging of the input
waveform occurs.
The second output, V_DN, is an inversion of V_UP but with
twice the slope and offset by a fixed amount. This output starts
at about 2.25 V (provided the supply voltage is ≥3.3 V) for the
minimum input and falls to a value close to ground at the
maximum input. This output is intended for analog control
loop applications. A setpoint voltage is applied to VSET, and
V_DN is then used to control a VGA or power amplifier. Here
again, an external filter capacitor can be added to extend the
averaging time. Consult the Applications section for
information on this mode.
The AD8314 is available in 8-lead MSOP and 8-lead LFCSP
packages and consumes 4.5 mA from a 2.7 V to 5.5 V supply.
When powered down, the typical sleep current is 20 μA.
FUNCTIONAL BLOCK DIAGRAM
RFIN
FLTR
–
+
DET
DET
DET
DET
DET
10dB
10dB
10dB
10dB
–
+
V-I
I-V
X2
VSET
V_UP
V_DN
COMM
(PADDLE)
OFFSET
COMPENSATION
AD8314
Figure 1.
BAND GAP
REFERENCE
VPOS
ENBL
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
AD8314
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage VPOS
V_UP, V_DN, VSET, ENBL
Input Voltage
Equivalent Power
Internal Power Dissipation
θJA (MSOP)
θJA (LFCSP, Paddle Soldered)
θJA (LFCSP, Paddle Not Soldered)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering 60 sec)
8-Lead MSOP
8-Lead LFCSP
Value
5.5 V
0 V, VPOS
1.6 V rms
17 dBm
200 mW
200°C/W
80°C/W
200°C/W
125°C
−40°C to +85°C
−65°C to +150°C
300°C
240°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 4 of 20
5 Page 
AD8314
THEORY OF OPERATION
The AD8314 is a logarithmic amplifier (log amp) similar in
design to the AD8313; further details about the structure and
function can be found in the AD8313 data sheet and other log
amps produced by ADI. Figure 28 shows the main features of
the AD8314 in block schematic form.
The AD8314 combines two key functions needed for the
measurement of signal level over a moderately wide dynamic
range. First, it provides the amplification needed to respond to
small signals, in a chain of four amplifier/limiter cells, each
having a small signal gain of 10 dB and a bandwidth of
approximately 3.5 GHz. At the output of each of these amplifier
stages is a full-wave rectifier, essentially a square-law detector
cell, that converts the RF signal voltages to a fluctuating current
having an average value that increases with signal level. A
further passive detector stage is added prior to the first stage.
Therefore, there are five detectors, each separated by 10 dB,
spanning some 50 dB of dynamic range. The overall accuracy at
the extremes of this total range, viewed as the deviation from an
ideal logarithmic response, that is, the law-conformance error,
can be judged by reference to Figure 7, which shows that errors
across the central 40 dB are moderate. Figure 5, Figure 6, Figure 8
through Figure 11, Figure 13, and Figure 14 show how the
conformance to an ideal logarithmic function varies with
supply voltage, temperature, and frequency.
The output of these detector cells is in the form of a differential
current, making their summation a simple matter. It can easily
be shown that such summation closely approximates a logarithmic
function. This result is then converted to a voltage, at Pin V_UP,
through a high-gain stage. In measurement modes, this output
is connected back to a voltage-to-current (V-I) stage, in such a
manner that V_UP is a logarithmic measure of the RF input
voltage, with a slope and intercept controlled by the design. For
a fixed termination resistance at the input of the AD8314, a
given voltage corresponds to a certain power level.
However, in using this part, it must be understood that log
amps do not fundamentally respond to power. It is for this
reason the dBV is used (decibels above 1 V rms) rather than the
commonly used metric of dBm. While the dBV scaling is fixed,
independent of termination impedance, the corresponding
power level is not. For example, 224 mV rms is always −13 dBV
(with one further condition of an assumed sinusoidal waveform;
see the Applications section for more information on the effect
of waveform on logarithmic intercept), and it corresponds to a
power of 0 dBm when the net impedance at the input is 50 Ω.
When this impedance is altered to 200 Ω, the same voltage
clearly represents a power level that is four times smaller
(P = V2/R), that is, −6 dBm. Note that dBV can be converted to
dBm for the special case of a 50 Ω system by simply adding
13 dB (0 dBV is equivalent to +13 dBm).
Therefore, the external termination added prior to the AD8314
determines the effective power scaling. This often takes the
form of a simple resistor (52.3 Ω provides a net 50 Ω input),
but more elaborate matching networks can be used. This
impedance determines the logarithmic intercept, the input
power for which the output would cross the baseline (V_UP =
zero) if the function were continuous for all values of input.
Because this is never the case for a practical log amp, the
intercept refers to the value obtained by the minimum-error
straight-line fit to the actual graph of V_UP vs. PIN (more
generally, VIN). Again, keep in mind that the quoted values
assume a sinusoidal (CW) signal. Where there is complex
modulation, as in CDMA, the calibration of the power response
needs to be adjusted accordingly. Where a true power (waveform-
independent) response is needed, the use of an rms-responding
detector, such as the AD8361, should be considered.
RFIN
COMM
(PADDLE)
FLTR
–
+
DET
DET
DET
DET
DET
10dB
10dB
10dB
10dB
–
+
V-I
I-V
X2
VSET
V_UP
V_DN
OFFSET
COMPENSATION
AD8314
BAND GAP
REFERENCE
VPOS
ENBL
Figure 28. Block Schematic
Rev. B | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet AD8314.PDF ] | |
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