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PDF AD8300 Data sheet ( Hoja de datos )
| Número de pieza | AD8300 | |
| Descripción | +3 Volt/ Serial Input Complete 12-Bit DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD8300 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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a
FEATURES
Complete 12-Bit DAC
No External Components
Single +3 Volt Operation
0.5 mV/Bit with 2.0475 V Full Scale
6 s Output Voltage Settling Time
Low Power: 3.6 mW
Compact SO-8 1.5 mm Height Package
APPLICATIONS
Portable Communications
Digitally Controlled Calibration
Servo Controls
PC Peripherals
+3 Volt, Serial Input
Complete 12-Bit DAC
AD8300
FUNCTIONAL BLOCK DIAGRAM
CLR
LD
CS
CLK
SDI
REF
EN
12-BIT
DAC
12
DAC
REGISTER
12
SERIAL
REGISTER AD8300
VOUT
VDD
GND
GENERAL DESCRIPTION
The AD8300 is a complete 12-bit, voltage-output digital-to-
analog converter designed to operate from a single +3 volt sup-
ply. Built using a CBCMOS process, this monolithic DAC
offers the user low cost, and ease-of-use in single-supply +3 volt
systems. Operation is guaranteed over the supply voltage range
of +2.7 V to +5.5 V making this device ideal for battery oper-
ated applications.
The 2.0475 V full-scale voltage output is laser trimmed to
maintain accuracy over the operating temperature range of the
device. The binary input data format provides an easy-to-use
one-half-millivolt-per-bit software programmability. The voltage
outputs are capable of sourcing 5 mA.
3.0
⌬VFS 1 LSB
2.8 DATA = FFFH
TA = +25؇C
2.6
PROPER OPERATION
2.4 WHEN VDD SUPPLY
VOLTAGE ABOVE
CURVE
2.2
2.0
0.01
0.1 1.0
OUTPUT LOAD CURRENT – mA
10
Figure 1. Minimum Supply Voltage vs. Load
A double buffered serial data interface offers high speed, three-
wire, DSP and microcontroller compatible inputs using data in
(SDI), clock (CLK) and load strobe (LD) pins. A chip select
(CS) pin simplifies connection of multiple DAC packages by
enabling the clock input when active low. Additionally, a CLR
input sets the output to zero scale at power on or upon user
demand.
The AD8300 is specified over the extended industrial (–40°C to
+85°C) temperature range. AD8300s are available in plastic
DIP, and low profile 1.5 mm height SO-8 surface mount packages.
1.00
0.75
0.50
VDD = +2.7V
TA = –40؇C, +25؇C, +125؇C
0.25
0.00
–0.25
–0.50
–0.75
–1.00
0
= –40؇C
= +25؇C
= +125؇C
1024
2048
3072
4096
DIGITAL INPUT CODE – Decimal
Figure 2. Linearity Error vs. Digital Code and Temperature
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
1 page  
80
60
POSITIVE
CURRENT
VDD = +5V
LIMIT
40 VDD = +3V
20
0
DATA = 800H
RL TIED TO +1.024V
–20
–40
–60
–80
0
VDD = +3V
VDD = +5V
NEGATIVE
CURRENT
LIMIT
1
OUTPUT VOLTAGE – Volts
2
Figure 4. IOUT vs. VOUT
Typical Performance Characteristics–AD8300
2.5
TA = –40 TO +85؇C
2.0
1.5
1.0
0.5
0
01 2 3 4 56
VDD SUPPLY VOLTAGE – Volts
Figure 5. Logic Input Threshold
Voltage vs. VDD
HORIZONTAL = 1s/DIV
Figure 6. Detail Settling Time
TIME = 100s/DIV
Figure 7. Broadband Noise
50
45 VDD = +5V ؎10%
40
35
30
VDD = +3V ؎10%
25
20
15
10
5
0
10
TA = +25؇C
DATA = FFFH
100 1k 10k 100k
FREQUENCY – Hz
1M
Figure 8. Power Supply Rejection
vs. Frequency
HORIZONTAL = 20s/DIV
Figure 9. Large Signal Settling Time
3.5
3.0
2.5
VDD = +3V
2.0
1.5 VDD = +5V
1.0
TA = +25؇C
0.5 DATA = FFFH
0
012345
LOGIC VOLTAGE – Volts
Figure 10. Supply Current vs. Logic
Input Voltage
CODE 800H TO 7FFH
Figure 11. Midscale Transition
Performance
0.5s/DIV
Figure 12. Digital Feedthrough vs.
Time
REV. A
–5–
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AD8300.PDF ] | |
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