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PDF AD8200 Data sheet ( Hoja de datos )
| Número de pieza | AD8200 | |
| Descripción | High Common-Mode Voltage/ Single Supply Difference Amplifier | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a High Common-Mode Voltage, Single Supply
Difference Amplifier
FEATURES
High Common-Mode Voltage Range –2 V to +24 V at a
5 V Supply Voltage
Operating Temperature Range
Die: –40؇C to +150؇C
8-Lead SOIC: –40؇C to +125؇C
Supply Voltage Range: 4.7 V to 12 V
Low-Pass Filter (One Pole or Two Pole)
EXCELLENT AC AND DC PERFORMANCE
15 V/؇C Max Offset Drift
20 ppm/؇C Max Gain Drift
80 dB CMRR Min DC to 10 kHz
PLATFORMS
Transmission Control
Diesel Injection Control
Engine Management
Semi-Active Suspension Control
Vehicle Dynamics Control
AD8200
FUNCTIONAL BLOCK DIAGRAM
SOIC (R) Package
DIE Form
+IN
–IN
200k⍀
NC
A1 A2
+VS
100k⍀
G = X10
+IN
A1
–IN
200k⍀
AD8200
G = X2
+IN
A2
–IN
10k⍀
OUT
10k⍀
NC = NO CONNECT
GND
GENERAL DESCRIPTION
The AD8200 is a single-supply difference amplifier for amplifying
and low-pass filtering small differential voltages in the presence
of a large common-mode voltage. The input CMV range extends
from –2 V to +24 V at a typical supply voltage of 5 V.
The AD8200 is offered in die and packaged form. Both package
options are specified over wide temperature ranges, making the
AD8200 well suited for use in many automotive platforms. The
SOIC package is specified over a temperature range of –40°C to
+125°C. The die is specified from –40°C to +150°C.
Automotive platforms demand precision components for better
system control. The AD8200 provides excellent ac and dc per-
formance that keeps errors to a minimum in the user’s system.
Typical offset and gain drift in the SOIC package are 6 µV/°C
and 10 ppm/°C, respectively. The device also delivers a mini-
mum CMRR of 80 dB from dc to 10 kHz.
The AD8200 features an externally accessible 100 kΩ resistor at
the output of the preamp A1, which can be used for low-pass
filter applications, and for establishing gains other than 20.
CLAMP
DIODE
INDUCTIVE
LOAD
5V
BATTERY 14V
4 TERM
SHUNT
POWER
DEVICE
+IN NC +VS OUT
AD8200
–IN GND A1 A2
OUTPUT
BATTERY 14V
POWER
DEVICE
5V
4 TERM
SHUNT
+IN NC +VS OUT
AD8200
–IN GND A1 A2
OUTPUT
CLAMP
DIODE
INDUCTIVE
LOAD
COMMON
NC = NO CONNECT
Figure 1. High-Line Current Sensor
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
COMMON
NC = NO CONNECT
Figure 2. Low-Line Current Sensor
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
1 page  
TEK RUN: 2.5MS/s HI RES
VOUT, RL = 10k⍀
1T
VIN
2
CH1 500mV⍀ CH2 50mV⍀ M 20s CH1 1.5V
TPC 7. Pulse Response
TEK RUN: 2.5MS/s AVERAGE
AD8200
1
VOUT, RL = 10k⍀
MAGNIFIED VOUT
3 VIN
2
CH1 1V CH 2 10mV M 20s CH1
CH3 100mV
1.36V
TPC 8. Settling Time
THEORY OF OPERATION
The AD8200 consists of a preamp and buffer arranged as shown
in Figure 3. Like-named resistors have equal values.
The preamp incorporates a dynamic bridge (subtractor) circuit.
Identical networks (within the shaded areas), consisting of RA,
RB, RC, and RG, attenuate input signals applied to Pins 1 and 8.
Note that when equal amplitude signals are asserted at inputs 1
and 8, and the output of A1 is equal to the common potential
(i.e., zero), the two attenuators form a balanced-bridge network.
When the bridge is balanced, the differential input voltage at A1
and thus its output, will be zero.
Any common-mode voltage applied to both inputs will keep the
bridge balanced and the A1 output at zero. Because the resistor
networks are carefully matched, the common-mode signal rejec-
tion approaches this ideal state.
However, if the signals applied to the inputs differ, the result is a
difference at the input to A1. A1 responds by adjusting its output
to drive RB, by way of RG, to adjust the voltage at its inverting
input until it matches the voltage at its noninverting input.
By attenuating voltages at Pins 1 and 8, the amplifier inputs are
held within the power supply range, even if Pin 1 and Pin 8 input
levels exceed the supply, or fall below Common (Ground.) The
input network also attenuates normal (differential) mode volt-
ages. RC and RG form an attenuator that scales A1 feedback,
forcing large output signals to balance relatively small differen-
tial inputs. The resistor ratios establish the preamp gain at ten.
Because the differential input signal is attenuated, and then
amplified to yield an overall gain of ten, the amplifier A1 oper-
ates at a higher noise gain, multiplying deficiencies such as input
offset voltage and noise with respect to Pins 1 and 8.
+IN –IN
RA RA
A1
RB RB
RCM
RCM
A3
RG RC RC RG
100k⍀
(TRIMMED)
AD8200
A2
RF
RF
To minimize these errors while extending the common-mode
range, a dedicated feedback loop is employed to reduce the
range of common-mode voltage applied to A1, for a given over-
all range at the inputs. By offsetting the range of voltage applied
to the compensator, the input common-mode range is also offset
to include voltages more negative than the power supply. Ampli-
fier A3 detects the common-mode signal applied to A1 and
adjusts the voltage on the matched RCM resistors to reduce the
common-mode voltage range at the A1 inputs. By adjusting the
common voltage of these resistors, the common-mode input
range is extended while, at the same time, the normal mode
signal attenuation is reduced, leading to better performance
referred to input.
The output of the dynamic bridge taken from A1 is connected
to Pin 3 by way of a 100 kΩ series resistor, provided for low-
pass filtering and gain adjustment. The resistors in the input
networks of the preamp and the buffer feedback resistors are
ratio-trimmed for high accuracy.
The output of the preamp drives a gain-of-two buffer-amplifier
A2, implemented with carefully matched feedback resistors RF.
The two-stage system architecture of the AD8200 enables the
user to incorporate a low-pass filter prior to the output buffer.
By separating the gain into two stages, a full-scale rail-to-rail
signal from the preamp can be filtered at Pin 3, and a half-scale
signal resulting from filtering can be restored to full scale by the
output buffer amp. The source resistance seen by the inverting
input of A2 is approximately 100 kΩ, to minimize the effects of
A2’s input bias current. However, this current is quite small and
errors resulting from applications that mismatch the resistance
are correspondingly small.
APPLICATIONS
The AD8200 difference amplifier is intended for applications
where it is required to extract a small differential signal in the
presence of large common-mode voltages. The input resistance
is nominally 200 kΩ, and the device can tolerate common-mode
voltages higher than the supply voltage and lower than ground.
The open collector output stage will source current to within
20 mV of ground.
COM
Figure 3. Simplified Schematic
REV. 0
–5–
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AD8200.PDF ] | |
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