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ADR425 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADR425
Beschreibung Ultraprecision Low Noise/ 2.048 V/2.500 V/ 3.00 V/5.00 V XFET Voltage References
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 16 Seiten
ADR425 Datasheet, Funktion
a Ultraprecision Low Noise, 2.048 V/2.500 V/
3.00 V/5.00 V XFET® Voltage References
ADR420/ADR421/ADR423/ADR425
FEATURES
Low Noise (0.1 Hz to 10 Hz)
ADR420: 1.75 V p-p
ADR421: 1.75 V p-p
ADR423: 2.0 V p-p
ADR425: 3.4 V p-p
Low Temperature Coefficient: 3 ppm/؇C
Long-Term Stability: 50 ppm/1000 Hours
Load Regulation: 70 ppm/mA
Line Regulation: 35 ppm/V
Low Hysteresis: 40 ppm Typical
Wide Operating Range
ADR420: 4 V to 18 V
ADR421: 4.5 V to 18 V
ADR423: 5 V to 18 V
ADR425: 7 V to 18 V
Quiescent Current: 0.5 mA Maximum
High Output Current: 10 mA
Wide Temperature Range: –40؇C to +125؇C
APPLICATIONS
Precision Data Acquisition Systems
High-Resolution Converters
Battery-Powered Instrumentation
Portable Medical Instruments
Industrial Process Control Systems
Precision Instruments
Optical Network Control Circuits
GENERAL DESCRIPTION
The ADR42x series are ultraprecision second-generation XFET
voltage references featuring low noise, high accuracy, and excellent
long-term stability in a SOIC and Mini_SOIC footprints. Patented
temperature drift curvature correction technique and XFET (eXtra
implanted junction FET) technology minimize nonlinearity of the
voltage change with temperature. The XFET architecture offers
superior accuracy and thermal hysteresis to the bandgap
references. It also operates at lower power and lower supply
headroom than the Buried Zener references.
The superb noise, stable, and accurate characteristics of ADR42x
make them ideal for precision conversion applications such as
optical network and medical equipment. The ADR42x trim
terminal can also be used to adjust the output voltage over a
±0.5% range without compromising any other performance. The
ADR42x series voltage references offer two electrical grades and
are specified over the extended industrial temperature range
of –40°C to +125°C. Devices are available in 8-lead SOIC-8 or
30% smaller 8-lead Mini_SOIC-8 packages.
PIN CONFIGURATION
Surface-Mount Packages
8-Lead SOIC
8-Lead Mini_SOIC
TP 1
8 TP
VIN 2 ADR42x 7 NIC
NIC 3 TOP VIEW 6 VOUT
GND 4 (Not to Scale) 5 TRIM
NIC = NO INTERNAL CONNECTION
TP = TEST PIN (DO NOT CONNECT)
Table I. ADR42x Products
ADR420
Products
ADR420
ADR421
ADR423
ADR425
Output
Voltage
VO
2.048
2.50
3.00
5.00
Initial
Accuracy
mV %
Tempco
ppm/°C
1, 3
1, 3
1.5, 4
2, 6
0.05, 0.15
0.04, 0.12
0.04, 0.12
0.04, 0.12
3, 10
3, 10
3, 10
3, 10
XFET is a registered trademark of Analog Devices, Inc.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002






ADR425 Datasheet, Funktion
ADR420x/SAeDrRie4s21T/AypDiRc4al2P3/eArDfoRr4m2a5nce Characteristics
2.0495
2.0493
2.0491
2.0489
2.0487
2.0485
2.0483
2.0481
2.0479
2.0477
2.0475
–40
–10
20 50 80
TEMPERATURE – ؇C
110 125
TPC 1. ADR420 Typical Output Voltage vs. Temperature
5.0025
5.0023
5.0021
5.0019
5.0017
5.0015
5.0013
5.0011
5.0009
5.0007
5.0005
40 10
20
40
80
TEMPERATURE ؇C
110 125
TPC 4. ADR425 Typical Output Voltage vs. Temperature
2.5015
2.5013
2.5011
2.5009
2.5007
2.5005
2.5003
2.5001
2.4999
2.4997
2.4995
40 10
20
50
80
TEMPERATURE ؇C
110 125
TPC 2. ADR421 Typical Output Voltage vs. Temperature
0.55
0.50 +125؇C
0.45
+25؇C
0.40
40؇C
0.35
0.30
0.25
4
6 8 10 12 14 15
INPUT VOLTAGE V
TPC 5. ADR420 Supply Current vs. Input Voltage
3.0010
3.0008
3.0006
3.0004
3.0002
3.0000
2.9998
2.9996
2.9994
2.9992
2.9990
40 10
20
40
80
TEMPERATURE ؇C
110 125
TPC 3. ADR423 Typical Output Voltage vs. Temperature
0.55
0.50
0.45
+125؇C
0.40
+25؇C
0.35
40؇C
0.30
0.25
4
6 8 10 12 14 15
INPUT VOLTAGE V
TPC 6. ADR421 Supply Current vs. Input Voltage
–6– REV. B

6 Page









ADR425 pdf, datenblatt
ADR420/ADR421/ADR423/ADR425
THEORY OF OPERATION
The ADR42x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFET), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about 120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate bandgap references. The big advantage
over a bandgap reference is that the intrinsic temperature
coefficient is some thirty times lower (therefore requiring less
correction), resulting in much lower noise since most of the
noise of a bandgap reference comes from the temperature
compensation circuitry.
Figure 1 shows the basic topology of the ADR42x series. The
temperature correction term is provided by a current source with a
value designed to be proportional to absolute temperature. The
general equation is:
VOUT = G × (VP R1 × IPTAT )
(1)
where G is the gain of the reciprocal of the divider ratio, VP is
the difference in pinch-off voltage between the two JFETs, and
IPTAT is the positive temperature coefficient correction current.
ADR42x are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V at the reference output respectively.
IPTAT
I1
I1
ADR42x
VIN
*
VP
R1
VOUT
R2
R3
*EXTRA CHANNEL IMPLANT
VOUT = G(VP R1 ؋ IPTAT)
GND
Figure 1. Simplified Schematic
Device Power Dissipation Considerations
The ADR42x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.5 V
to 18 V. When these devices are used in applications at higher
current, users should account for the temperature effects due to
the power dissipation increases with the following equation:
TJ = PD × θJA + TA
(2)
where TJ and TA are the junction and ambient temperatures,
respectively, PD is the device power dissipation, and θJA is the
device package thermal resistance.
Basic Voltage Reference Connections
Voltage references, in general, require a bypass capacitor
connected from VOUT to GND. The circuit in Figure 2
illustrates the basic configuration for the ADR42x family of
references. Other than a 0.1 µF capacitor at the output to help
improve noise suppression, a large output capacitor at the
output is not required for circuit stability.
VIN
+
10F
0.1F
TP 1
8 TP
2 ADR42x 7 NIC
OUTPUT
NIC 3 TOP VIEW 6
(Not to Scale)
4 5 TRIM
0.1F
NIC = NO INTERNAL CONNECTION
TP = TEST PIN
(DO NOT CONNECT)
Figure 2. Basic Voltage Reference Configuration
Noise Performance
The noise generated by the ADR42x family of references is
typically less than 2 µV p-p over the 0.1 Hz to 10 Hz band
for ADR420, ADR421, and ADR423. TPC 22 shows the 0.1
Hz to 10 Hz noise of the ADR421, which is only 1.75 µV p-p.
The noise measurement is made with a bandpass filter made of
a 2-pole high-pass filter with a corner frequency at 0.1 Hz and
a 2-pole low-pass filter with a corner frequency at 10 Hz.
Turn-On Time
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. TPC 29 through TPC 33, inclusive, show the turn-on
settling time for the ADR421.
APPLICATIONS SECTION
OUTPUT ADJUSTMENT
The ADR42x trim terminal can be used to adjust the output voltage
over a ± 0.5% range. This feature allows the system designer to
trim system errors out by setting the reference to a voltage other
than the nominal. This is also helpful if the part is used in a system
at temperature to trim out any error. Adjustment of the output has
negligible effect on the temperature performance of the device.
To avoid degrading temperature coefficient, both the trimming
potentiometer and the two resistors need to be low temperature
coefficient types, preferably <100 ppm/°C.
INPUT
VIN
VO
ADR42x
TRIM
GND
R1
470k
OUTPUT
VO = ؎0.5%
Rp
10k
R2
10k(ADR420)
15k(ADR421)
Figure 3. Output Trim Adjustment
–12–
REV. B

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