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PDF ADP3510ARU Data sheet ( Hoja de datos )
| Número de pieza | ADP3510ARU | |
| Descripción | CDMA Power Management System | |
| Fabricantes | Analog Devices | |
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a
CDMA Power Management System
FEATURES
Handles All CDMA Baseband Power Management
Six LDOs Optimized for Specific CDMA Subsystems
Li-Ion and NiMH Battery Charge Function
Ambient Temperature: ؊20؇C to +85؇C
TSSOP 28-Lead Package
Optimized for LSI Logic Baseband Chipset
APPLICATIONS
CDMA Handsets
GENERAL DESCRIPTION
The ADP3510 is a multifunction power system chip optimized for
CDMA handset power management. It contains six specialized
LDOs, one to power each of the critical CDMA subblocks.
Sophisticated controls are available for power-up during battery
charging, keypad interface, and RTC alarm. If a Li-Ion battery
is being charged, the charge circuit maintains low current
charging during the initial charge phase and provides an end of
charge (EOC) signal when the cell has been fully charged.
The ADP3510 is specified over the temperature range of –20∞C to
+85∞C and is available in a narrow body TSSOP 28-Lead package.
ADP3510
FUNCTIONAL BLOCK DIAGRAM
VBAT VBAT2
PWRONKEY
ROWX
PWRONIN
ALARM
PDCAP
TCXOEN
RESCAP
CHRDET
EOC
CHGEN
GATEIN
BATSNS
ISENSE
GATEDR
CHRIN
POWER-UP
SEQUENCING
AND
PROTECTION
LOGIC
RTC
VIO
LDO
DIGITAL
CORE LDO
ANALOG
LDO
TCXO
LDO
MEMORY
LDO
REF
BUFFER
BATTERY
CHARGE
CONTROLLER
BATTERY
VOLTAGE
DIVIDER
ADP3510
VTRC
VIO
VCORE
VAN
VTCXO
VMEM
REFOUT
RESET
MVBAT
DGND
AGND
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
1 page  
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin with respect to
any GND Pin . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +10 V
Voltage on any pin may not exceed VBAT, with the following
exceptions: CHRIN, GATEDR, ISENSE
Storage Temperature Range . . . . . . . . . . . . –65∞C to +150∞C
Operating Ambient Temperature Range . . . . –20∞C to +85∞C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125∞C
qJA, Thermal Impedance (TSSOP-28)
2-Layer PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98∞C/W
4-Layer PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68∞C/W
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300∞C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
Model
ADP3510ARU
ADP3510
ORDERING GUIDE
Temperature Range
–20∞C to ؉85∞C
Package Option
RU-28
PIN CONFIGURATION
∑
PWRONIN 1
PWRONKEY 2
ROWX 3
ALARM 4
PDCAP 5
VRTC 6
BATSNS 7
MVBAT 8
CHRDET 9
CHRIN 10
GATEIN 11
GATEDR 12
DGND 13
ISENSE 14
ADP3510
TOP VIEW
(Not to Scale)
28 TCXOEN
27 AGND
26 REFOUT
25 VTCXO
24 VAN
23 VBAT
22 VCORE
21 VMEM
20 VBAT2
19 VIO
18 RESET
17 RESCAP
16 CHGEN
15 EOC
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Function
1 PWRONIN Power-On/-Off Signal from
Microprocessor
2 PWRONKEY Power-On/-Off Key
3 ROWX
Power Key Interface Output
4 ALARM
Alternative Power-On
5 PDCAP
Power-On Delay Timer Capacitor
6 VRTC
VRTC LDO Output
7 BATSNS
Battery Voltage Sense Input
8 MVBAT
Divided Battery Voltage Output
9 CHRDET Charge Detect Output
10 CHRIN
Charger Input Voltage
11 GATEIN
Microprocessor Gate Input Signal
12 GATEDR Gate Drive Output
13 DGND
Digital Ground
14 ISENSE
Charge Current Sense Input
15 EOC
End of Charge Signal
16 CHGEN
Charger Enable for GATEIN, NiMH
Pulse Charging
17 RESCAP
Reset Delay Time
18 RESET
Main Reset
19 VIO
I/O LDO Output
20 VBAT2
Battery Input Voltage 2
21 VMEM
Memory LDO Output
22 VCORE
Digital Core LDO Output
23 VBAT
Battery Input Voltage
24 VAN
Analog LDO Output
25 VTCXO
TCXO LDO Output
26 REFOUT Output Reference
27 AGND
Analog Ground
28 TCXOEN TCXO LDO Enable and MVBAT
Enable
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although the
ADP3510 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–5–
5 Page 
ADP3510
1.2
1.0
0.8
0.6
0.4
0.2
0.0
–20
0 20 40 60 80
AMBIENT TEMPERATURE – ؇C
100
Figure 4. Power Dissipation vs. Temperature
However, high battery voltages normally occur only when the battery
is being charged and the handset is not in conversation mode. In
this mode, there is a relatively light load on the LDOs. A fully
charged Li-Ion battery is 4.245 V, where the ADP3510 can deliver
the maximum power (0.52 W) up to 85∞C ambient temperature.
Low Dropout Regulators (LDOs)
The ADP3510 high performance LDOs are optimized for their
given functions by balancing quiescent current, dropout voltage,
regulation, ripple rejection, and output noise. 2.2 mF tantalum or
MLCC ceramic capacitors are recommended for use with the core,
memory, IO, and analog LDOs. A 0.22 mF capacitor is recom-
mended for the TCXO LDO.
Digital Core LDO (VCORE)
The digital core LDO supplies the baseband circuitry in the
handset (baseband processor and baseband converter). The LDO
has been optimized for very low quiescent current at light loads
as this LDO is on at all times.
Memory LDO (VMEM)
The memory LDO supplies the memory of the baseband pro-
cessor. The memory LDO is capable of supplying 60 mA of
current and has also been optimized for low quiescent current
and will power up at the same time as the core LDO.
Analog LDO (VAN)
This LDO has the same features as the core LDO. It has further-
more been optimized for good low frequency ripple rejection for
use with the baseband converter sections in order to reject the
ripple coming from the RF power amplifier. VAN is rated to
75 mA load, which is sufficient to supply the complete analog
section of the baseband converter. The analog LDO is controlled
by the power-on delay block of the ADP3510.
TCXO LDO (VTCXO)
The TCXO LDO is intended as a supply for a temperature compen-
sated crystal oscillator, which needs its own ultralow noise supply.
VTCXO is rated for 10 mA of output current and is turned on
when TCXOEN is asserted.
RTC LDO (VRTC)
The RTC LDO charges up a rechargeable lithium type coin
cell to run the realtime clock module. It has been designed to
charge manganese lithium batteries such as the ML series
(ML614, ML621, or ML1220) from Sanyo. The ML621 has a
small physical size (6.8 mm diameter) and will give many hours
of backup time.
The ADP3510 supplies current both for charging the coin cell
and for the RTC module. The nominal charging voltage is 2.85 V,
which ensures long cell life while obtaining in excess of 90% of
the nominal capacity. In addition, it features a very low quies-
cent current since this LDO is running all the time, even when
the handset is switched off. It also has reverse current protection
with low leakage, which is needed when the main battery is
removed and the coin cell supplies the RTC module.
IO LDO (VIO)
The IO LDO generates the voltage needed for the peripheral
subsystems of the baseband processor, including GPIO, display,
and serial interfaces. It is rated for 25 mA of supply current and
is controlled by the power-on delay block of the ADP3510.
Reference Output (REFOUT)
The reference output is a low noise, high precision reference with
a guaranteed accuracy of 1.65% over temperature. The reference
can be used with the baseband converter, if the converter’s own
reference is not accurate. This may significantly reduce the calibra-
tion time needed for the baseband converter during production.
Power ON/OFF
The ADP3510 handles all issues regarding the powering ON and
OFF of the handset. It is possible to turn on the ADP3510 in
four different ways:
∑ Pulling the PWRONKEY Low
∑ Pulling PWRONIN High
∑ Pulling ALARM High
∑ CHRIN Exceeds CHRDET Threshold
Pulling the PWRONKEY low is the normal way of turning on the
handset. This will turn on all the LDOs, as long as the PWRONKEY
is held low. When the VIO LDO comes into regulation, the RESET
timer is started. After timing out, the RESET pin goes high, allowing
the baseband processor to start up. With the baseband processor
running, it can poll the ROWX pin of the ADP3510 to determine
if the PWRONKEY has been depressed and pull PWRONIN
high. Once the PWRONIN is taken high, the PWRONKEY can be
released. Note that by monitoring the ROWX pin, the baseband
processor can detect a second PWRONKEY press and turn the
LDOs off in an orderly manner. In this way, the PWRONKEY
can be used for ON/OFF control.
Pulling the ALARM pin high is how the alarm in the realtime
clock module will turn the handset on. Asserting ALARM will
turn the core, IO, memory, and analog LDOs on, starting up
the baseband processor.
Applying an external charger can also turn the handset on. This
will turn on all the LDOs, again starting up the baseband processor.
Note that if the battery voltage is below the undervoltage lockout
threshold, applying the adapter will not start up the LDOs.
REV. 0
–11–
11 Page | ||
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| PDF Descargar | [ Datasheet ADP3510ARU.PDF ] | |
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