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PDF ADP3500 Data sheet ( Hoja de datos )
| Número de pieza | ADP3500 | |
| Descripción | CDMA Power Management System | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADP3500 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
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PRELIMINARY TECHNICAL DATA
a
CDMA Power Management System
Preliminary Technical Data
ADP3500
FEATURES
Handles all CDMA Baseband and RF/IF Power Management
Functions
LDOs Optimized for Specific CDMA Subsystems
Four Backup LDOs for Stand-By mode operation
Four Li-Ion Battery Charge Modes
5mA Pre Charge
Low Current Charge
Full Current Charge
Regulator mode (no current limit)
Ambient Temperature: -30 °C to +85 °C
64pin 7x7 LQFP package
APPLICATIONS
CDMA/CDMA2000/PCS Handsets
GENERAL DESCRIPTION
The ADP3500 is a multifunction power system chip optimized
for CDMA cell phone power management. It contains 15 LDOs.
Sophisticated controls are available for power up during battery
charging, keypad interface, GPIO/INT function and RTC
function. The battery charger has four modes as Pre-charge, Low
Current Charge, Full Current Charge, and Regulator modes, and
is designed for Li-Ion/Li-Polymer batteries.
LOGIC
BLOCK
POWER ON
DELAY 10mS
KEYPAD I/F
INTERRUPT
CONTROL
GPIO
LDO CONTROL
SERIAL I/F
RESET
32KHz OUTPUT
CONTROL
RESET OUTPUT
RTC COUNTER
STAY-ALIVE
TIMER
ANALOG
BLOCK
BATTERY
CHARGER
REFERENCE
LDO1 to 11
VOLTAGE
DETECTOR
ADP3500
Figure 1. Functional Block Diagram
REV. PrP 2/6/02
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or apatent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-87ß3
ANALOG DEVICES, INC., 2002
1 page  
PRELIMINARY TECHNICAL DATA
Output capacitor required for stability
Dropout voltage
Ripple rejection
Output noise voltage
Start-up Time from Shutdown
GND Current
C LDO#10
VDO
VNOISE
ILDO#10
Io = 50mA
f = 1KHz
f = 100 Hz to 100KHz
Io=50mA
1
150
50
40
250
50
ADP3500
µF
mV
dB
µVRMS
µS
µA
Optional LDO (LDO #11)
Parameter
Output voltage
Output capacitor required for stability
Ripple rejection
Output noise voltage
Start-up Time from Shutdown
GND Current
Symbol
VLDO#11
C LDO#11
VNOISE
Conditions
Io = 1 to 100 mA
Ta= -30 to +85°C
f = 1KHz
f = 100 Hz to 100KHz
ILDO#11
Io=150mA
Min Typ Max Units
1.42 1.5 1.58 V
2.2
50
50
250
50
µF
dB
µVRMS
µS
µA
Voltage Detector for LDO1 and LDO6
Parameter
LDO1 detect voltage
LDO1 release voltage
LDO1 Hysteresis
LDO6 detect voltage
LDO6 release voltage
LDO6 Hysteresis
Symbol
VDET1
VDET1
VHYS1
VDET6
VDET6
VHYS6
Conditions
Ta= -30 to +85°C
Ta= -30 to +85°C
Ta= -30 to +85°C
Ta= -30 to +85°C
Ta= -30 to +85°C
Ta= -30 to +85°C
Min Typ Max Units
2.7 2.72
V
2.77 VLDO1 V
-NOM
35 52 85 mV
2.3 2.33
V
2.40 VLDO6 V
-NOM
40 60 100 mV
BATTERY VOLTAGE DIVIDER: MVBAT
TA =-30 to 85°C, CVBAT=10µF MLCC, CAdapter=1µF MLCC unless otherwise noted
Parameter
MVBAT Output voltage
5 – bit programmable
MVBAT Output voltage step
Output drive current capability
MVBAT Load Regulation
MVBAT Output Voltage Step
Operating Battery Current
Shutdown Current
Symbol
VMVBAT
Vstep
Iout
∆ΜVBAT
Conditions
VBAT=4.35V, MVEN = 1
code 10000
code 01111
VBAT=4.35V, MVEN = 1
0 < Iout < 100 µA
VBAT = 4.35 V, MVEN = 1
VBAT = 4.35 V, MVEN = 1
VBAT = 4.35 V, MVEN = 0
Min Typ Max Units
2.484
2.673
1
2.508
2.697
6
2
3
6
65
2.533
2.727
5
85
1
V/V
V/V
mV/lsb
mA
mV
mV
µA
µA
BATTERY CHARGER
TA =-30 to 85°C, CVBAT =10µF MLCC, CAdapter =1µF MLCC, 4.0V ≤ ADAPTER ≤ 12V unless otherwise noted
Parameter
Charger Control Voltage Range
2 – bit programmable
Charger Control Voltage Range
2 – bit programmable
Symbol
VBAT
SENSE
VBAT
SENSE
Conditions
Ta= 25 °C,
VR_SENSE = 6mV & 115mV,
5.5V ≤ ADAPTER ≤ 12V (note 1)
code 00 (default)
code 01
code 10
code 11
Ta= -20 to 55°C,
VR_SENSE = 6mV & 115mV,
5.5V ≤ ADAPTER ≤ 12V (note 1)
code 00 (default)
code 01
code 10
code 11
Min Typ Max Units
3.926
4.150
4.170
4.190
3.980
4.190
4.210
4.230
4.034
4.230
4.250
4.270
V
V
V
V
3.905
4.130
4.146
4.166
3.980
4.190
4.210
4.230
4.065
4.250
4.278
4.300
V
V
V
V
REV.PrP 2/6/02
-5-
5 Page 
PRELIMINARY TECHNICAL DATA
BLOCK DIAGRAM
ADP3500
PWRONKEY- 62
OPT1- 63
OPT2- 64
OPT3 1
INT- 16
KEYPADCOL0 2
KEYPADCOL1 3
KEYPADCOL2 4
KEYPADCOL3 5
KEYPADROW0 6
KEYPADROW1 7
KEYPADROW2 8
KEYPADROW3 9
KEYPADROW4 10
KEYPADROW5 11
BLIGHT 14
DGND 15
CS 26
CLKIN 27
DATA 25
GPIO0 21
GPIO1 22
GPIO2 23
GPIO3 24
OSC IN 20
AGND
56 50 39 19
VBAT
52 48
140KΩ
POWERON_N
OPT1_N
OPT2_N
OPT3
RTC
Alarm
CLK
sync
5
Level
trans
power_on
BATID
voltage_detect
Delay
10mS
PW ROFF
CLK
Data
In
INT_N
VBAT
45 42 37 34
ADAPTER ISENSE BASE
59 61
100KΩ
58
BVS
54
Charger_Detect
Charger Control
Battery Charger
DDLO
LDO_EN
REF
REF
ON/OFF
LOGIC
ON/OFF
LOGIC
ON/OFF
LOGIC
ON/OFF
LOGIC
Main
Sub
Main
Sub
Main
Main
Sub
LDO1
LDO2
LDO3
LDO6
LDO4
LPF
LDO1
60 BATID
57 MVBAT (VBAT Measure)
40 REFO
55 NRCAP
36 LDO1 (Baseband VDD)
41 LDO2 (Baseband AVDD)
38 LDO3 (RTC/Coin-cell)
46 LDO6 (Baseband Core)
43 LDO4 (Audio)
Level
trans
LDO1
4
Level
trans 6
KEY
PAD
I/F
LDO1
5
INT
GPIO_INT / gpi_intrst
LDO5
LDO7
LDO8
LDO9
LDO10
LDO11
44 LDO5 (Vibrator)
47 LDO7 (RF Rx1)
49 LDO8 (RF Tx)
51 LDO9 (RF Rx2)
53 LDO10 (RF Option)
35 LDO11 (Option)
Level
trans
32KHz
Serial
I/F
GPIO
+
INT
DATA
DATA
CLKs
Level Translator
Voltage
Detector
Level
trans
DGND
Level Translator
VBAT & RTCV
DGND
LDO1
LDO1
RTCV RTCV
13 SLEEP-
12 TCXO_ON
28 RESETIN-
17 RTCV
OSC OUT 18
32K OUT 29
Delay
30mS
RTC
/clock
CLKs
Data
Stay/Alive
Timer
0.25-8sec
Data
RESETIN_N
Delay
50mS
Open Drain
32 TEST
33 RSTDELAY-
31 RESETOUT-
30 RESET+
Figure 3. Overall Block Diagram
REV.PrP 2/6/02
- 11 -
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet ADP3500.PDF ] | |
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