PDF ADP3408ARU-18 Data sheet ( Hoja de datos )

Número de pieza	ADP3408ARU-18
Descripción	GSM Power Management System
Fabricantes	Analog Devices
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No Preview Available ! a GSM Power Management System ADP3408 FEATURES Handles all GSM Baseband Power Management Six LDOs Optimized for Specific GSM Subsystems Li-Ion and NiMH Battery Charge Function Optimized for the AD20msp430 Baseband Chipset APPLICATIONS GSM/DCS/PCS/CDMA Handsets GENERAL DESCRIPTION The ADP3408 is a multifunction power system chip optimized for GSM handsets, especially those based on the Analog Devices AD20msp430 system solution. It contains six LDOs, one to power each of the critical GSM sub-blocks. Sophisticated controls are available for power-up during battery charging, keypad interface, and RTC alarm. The charge circuit maintains low current charging during the initial charge phase and provides an end-of-charge signal when a Li-Ion battery is being charged. The ADP3408 is specified over the temperature range of –20°C to +85°C and is available in narrow body TSSOP-28 pin package. FUNCTIONAL BLOCK DIAGRAM VBAT VBAT2 VRTCIN PWRONKEY ROWX PWRONIN TCXOEN SIMEN RESCAP CHRDET EOC CHGEN GATEIN BATSNS ISENSE GATEDR CHRIN POWER-UP SEQUENCING AND PROTECTION LOGIC SIM LDO DIGITAL CORE LDO ANALOG LDO TCXO LDO MEMORY LDO RTC LDO REF BUFFER VSIM VCORE VAN VTCXO VMEM VRTC 26 REFOUT RESET BATTERY CHARGE CONTROLLER BATTERY CHARGE DIVIDER ADP3408 MVBAT DGND 27 AGND REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001 1 page ADP3408 ABSOLUTE MAXIMUM RATINGS* Voltage on any pin with respect to any GND Pin . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +10 V Voltage on any pin may not exceed VBAT, with the following exceptions: CHRIN, GATEDR, ISENSE Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Operating Ambient Temperature Range . . . . . –20°C to +85°C Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125°C θJA, Thermal Impedance (TSSOP-28) 4-Layer PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W 1-Layer PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98°C/W Lead Temperature Range (Soldering, 60 sec.) . . . . . . . . 300°C This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged. ORDERING GUIDE Model Core LDO Output Temperature Voltage Range Package Option ADP3408ARU-2.5 2.5 V ADP3408ARU-1.8 1.8 V –20°C to +85°C RU-28 –20°C to +85°C RU-28 *RU = Thin Shrink Small Outline PIN CONFIGURATION PWRONIN 1 28 TCXOEN PWRONKEY 2 27 AGND ROWX 3 26 REFOUT SIMEN 4 25 VTCXO VRTCIN 5 24 VAN VRTC 6 ADP3408 23 VBAT BATSNS 7 TOP VIEW 22 VCORE MVBAT 8 (Not to Scale) 21 VMEM CHRDET 9 20 VBAT2 CHRIN 10 19 VSIM GATEIN 11 18 RESET GATEDR 12 17 RESCAP DGND 13 16 CHGEN ISENSE 14 15 EOC Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PIN FUNCTION DESCRIPTIONS Mnemonic PWRONIN PWRONKEY ROWX SIMEN VRTCIN VRTC BATSNS MVBAT CHRDET CHRIN GATEIN GATEDR DGND ISENSE EOC CHGEN RESCAP RESET VSIM VBAT2 VMEM VCORE VBAT VAN VTCXO REFOUT AGND TCXOEN Function Power On/Off Signal from Microprocessor Power-On/-Off Key Power Key Interface Output SIM LDO Enable RTC LDO Input Voltage Real-Time Clock Supply/ Coin Cell Battery Charger Battery Voltage Sense Input Divided Battery Voltage Output Charge Detect Output Charger Input Voltage Microprocessor Gate Input Signal Gate Drive Output Digital Ground Charge Current Sense Input End of Charge Signal Charger Enable for GATEIN, NiMH Pulse Charging Reset Delay Time Main Reset SIM LDO Output Battery Input Voltage 2 Memory LDO Output Digital Core LDO Output Battery Input Voltage Analog LDO Output TCXO LDO Output Output Reference Analog Ground TCXO LDO Enable and MVBAT Enable CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3408 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. 0 –5– 5 Page ADP3408 PWRON PWRONKEY KEYPADROW GPIO VRTC AUXADC GPIO CHARGER IN GPIO CAPACITOR TYPE BACKUP COIN CELL C1 0.1␮F R1 0.33⍀ C2, 10nF Q1 SI3441DY D1 LI OR NIMH BATTERY PWRONIN TCXOEN PWRONKEY AGND ROWX REFOUT SIMEN VTCXO VRTCIN U1 VAN ADP3408 VRTC VBAT BATSNS VCORE MVBAT VMEM CHRDET VBAT2 CHRIN VSIM GATEIN RESET GATEDR RESCAP DGND CHGEN ISENSE EOC R2 10⍀ C3, 10␮F C8 2.2␮F C6 2.2␮F C5 2.2␮F C4 0.1␮F C7 2.2␮F C9 0.22␮F CLKON C10 0.1␮F REF VTCXO VAN VCORE VMEM VSIM RESET GPIO GPIO Figure 3. Typical Application Circuit THEORY OF OPERATION The ADP3408 is a power management chip optimized for use with GSM baseband chipsets in handset applications. Figure 1 shows a block diagram of the ADP3408. The ADP3408 contains several blocks: • Six Low Dropout Regulators (SIM, Core, Analog, Crystal Oscillator, Memory, Real-Time Clock) • Reset Generator • Buffered Precision Reference • Lithium Ion Charge Controller and Processor Interface • Power-On/-Off Logic • Undervoltage Lockout • Deep Discharge Lockout These functions have traditionally been done either as a discrete implementation or as a custom ASIC design. The ADP3408 combines the benefits of both worlds by providing an integrated standard product where every block is optimized to operate in a GSM environment while maintaining a cost competitive solution. Figure 3 shows the external circuitry associated with the ADP3408. Only a minimal number of support components are required. Input Voltage The input voltage range of the ADP3408 is 3 V to 5.5 V and is optimized for a single Li-Ion cell or three NiMH cells. The thermal impedance of the ADP3408 is 68°C/W for four-layer boards. The end-of-charge voltage for high capacity NiMH cells can be as high as 5.5 V. Power dissipation should be calculated at maximum ambient temperatures and battery voltage in order not to exceed the 125°C maximum allowable junction temperature. Figure 4 shows the maximum power dissipation as a function of ambient temperature. However, high battery voltages normally occur only when the battery is being charged and the handset is not in conversation mode. In this mode there is a relatively light load on the LDOs. A fully charged Li-Ion battery is 4.25 V, where the ADP3408 can deliver the maximum power (0.56W) up to 85°C ambient temperature. 1.2 1.0 0.8 0.6 0.4 0.2 0.0 –20 0 20 40 60 80 AMBIENT TEMPERATURE – ؇C 100 Figure 4. Power Dissipation vs. Temperature Low Dropout Regulators (LDOs) The ADP3408 high-performance LDOs are optimized for their given functions by balancing quiescent current, dropout voltage, regulation, ripple rejection, and output noise. 2.2 µF tantalum or MLCC ceramic capacitors are recommended for use with the core, memory, SIM, and analog LDOs. A 0.22 µF capacitor is recommended for the TCXO LDO. REV. 0 –11– 11 Page

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