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ADP3020ARU Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP3020ARU
Beschreibung High-Efficiency Notebook Computer Power Supply Controller
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 22 Seiten
ADP3020ARU Datasheet, Funktion
a
High-Efficiency Notebook Computer
Power Supply Controller
ADP3020
FEATURES
Wide Input Voltage Range: 4.5 V to 25 V
High Conversion Efficiency > 96%
Integrated Current Sense—No External Resistor Required
Low Shutdown Current: 7 A (Typical)
Dual Synchronous Buck Controllers with Selectable
PWM/Power-Saving Mode Operation
Built-In Gate Drive Boost Circuit for Driving External
N-Channel MOSFETs
Two Independently Programmable Output Voltages
Fixed 3.3 V or Adjustable (1.25 V to VIN–0.5 V)
Fixed 5 V or Adjustable (1.25 V to VIN–0.5 V)
Programmable PWM Frequency
Integrated Linear Regulator Controller
Extensive Circuit Protection Functions
38-Lead TSSOP Package
APPLICATIONS
Notebook Computers and PDAs
Portable Instruments
General Purpose DC-DC Converters
GENERAL DESCRIPTION
The ADP3020 is a highly efficient dual synchronous buck switch-
ing regulator controller optimized for converting the battery or
adapter input into the system supply voltages required in note-
book computers. The ADP3020 uses a dual-mode PWM/Power
Saving Mode architecture to maintain efficiency over a wide
load range. The oscillator frequency can be programmed for
200 kHz, 300 kHz, or 400 kHz operation, or it can be synchro-
nized to an external clock signal of up to 600 kHz.
The ADP3020 provides accurate and reliable short circuit pro-
tection using an internal current sense circuit, which reduces
cost and increases overall efficiency. Other protection features
include programmable soft-start, UVLO, and integrated output
undervoltage/overvoltage protection. The ADP3020 contains a
linear regulator controller that is designed to drive an external
P-channel MOSFET or PNP transistor. The linear regulator
output is adjustable, and can be used to generate the auxiliary
voltages required in many laptop designs.
VIN
5.5V TO 25V
5V
FUNCTIONAL BLOCK DIAGRAM
Q3
L2
Q4
ADP3020
5V LINEAR 1.20V
REF
PFO
5V
SMPS
3.3V
SMPS
Q1
L1
Q2
3.3V
SS5
PWRGD
POWER-ON
RESET
LINEAR
CONTROLLER
SS3
Q5
2.5V
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000






ADP3020ARU Datasheet, Funktion
ADP3020
INPUT
5V
AUXVCC
32
SD 33
INTVCC
31
VIN
30
ADP3020
+ 4.7V
+5V
LINEAR REG
1.2V
REF
8
AGND
9
1.2V
REF
ULVO
72mV
–+
+
14mV
+
+
PFO 20
PFI 19
1.20V
+
MODE 11
SYNC 12
PWRGD 21
3.3V
CPOR
22
200kHz/
300kHz/
400kHz
OSC
POWER– FB5
ON
RESET
2.5V
DRV2
25
FB2
24
1.2V +
4A
CONTROL
LOGIC
INTVCC
+
– –3mV
1.22V
+
+2%
+ 1.2V
0%
+
2% 1.18V
SD2 23
+
1.2V –
EA 1.2V
SHUTDOWN
S
Q
R
ON5
1.44V
+
+20%
0.96V
+
20%
OC
2.5V
0.7A
4A
+
– 1.2V
CS5
1
CLSET5
7
BST5
38
DRVH5
37
SW5
36
DRVL5
35
PGND
34
FB5
2
EAN5
3
EAO5
4
5 ADJ/FX5
SS5
6
VOUT5
5V
DUPLICATE FOR SECOND CONTROLLER
Figure 1. Block Diagram (All Switches and Components Are Shown for Fixed Output Operation)
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ADP3020ARU pdf, datenblatt
ADP3020
Output Voltage Adjustment
Fixed output voltages (5 V and 3.3 V) are selected when
ADJ/FX5 = ADJ/FX3 = 0 V. The output voltage of each con-
troller can also be set by an external feedback resistor network
when ADJ/FX5 = ADJ/FX3 = 5 V as shown in Figure 18. There
should be two external feedback resistor dividers for each con-
troller, one for the voltage feedback loop, and one for output
voltage monitor. Both resistor dividers need to be identical. The
minimum output voltage is 1.25 V. The maximum output volt-
age is limited only by the minimum supply voltage. Remote
output voltage sensing can be done for both fixed and adjustable
output voltage modes.
The output voltage can be calculated using the following formula:
VOUT
=
REF
×
1
+
R1
R2
(1)
where REF = 1.2 V, and R1/R2 = R3/R4.
VIN
DRVH
DRVL
ADP3020
FB
EAN
ADJ/FX
R3
R4
5V
R1
R2
VOUT
Figure 18. Adjustable Output Mode
If the loop is carefully compensated, R3 and R4 can be, removed,
and FB and EAN can be tied together.
APPLICATION INFORMATION
A typical notebook PC application circuit using the ADP3020 is
shown in Figure 19. Although the component values given in
Figure 19 are based on a 5 V @ 4 A /3.3 V @ 4 A/2.5 V @ 1.5 A
design, the ADP3020 output drivers are capable of handling out-
put currents anywhere from <1 A to over 10 A. Throughout this
section, design examples and component values will be given for
three different power levels. For simplicity, these levels will be
referred to as low power, basic, and extended power. Table
III shows the input/output specifications for these three levels.
Table III. Typical Power Level Examples
Input Voltage
Range
Switching
Output 1
Switching
Output 2
Linear Output
Low Power
5.5 V to 25 V
3.3 V/2 A
5 V/2 A
2.5 V/1 A
Basic
Extended
Power
5.5 V to 25 V 5.5 V to 25 V
3.3 V/4 A 3.3 V/10 A
5 V/4 A
5 V/10 A
2.5 V/1.5 A 2.5 V/2 A
Input Voltage Range
The input voltage range of the ADP3020 is 5.5 V to 25 V when
5 V output is desired, and 4.5 V to 25 V when neither switcher
output is >4.0 V. This converter design is optimized to deliver
the best performance within a 7.5 V to 18 V range, which is the
nominal voltage for three to four cell Li-Ion battery stacks. Volt-
ages above 18 V may occur under light loads and when the
system is powered from an ac adapter with no battery installed.
Maximum Output Current and MOSFET Selection
The maximum output current for each switching regulator is lim-
ited by sensing the voltage drop between the drain and source of
the high-side MOSFET when it is turned on. A current sense
comparator senses voltage drop between CS5 and SW5 for the
5 V converter and between CS3 and SW3 for the 3.3 V converter.
The sense comparator threshold is 72 mV when the program-
ming pin, CLSET, is floating, and is 144 mV when CLSET is
connected to ground. Current-limiting is based on sensing the
peak current. Peak current varies with input voltage and depends
on the inductor value. The higher the ripple current or input
voltage, the lower the converter maximum output current at the
set current sense amplifier threshold. The relation between peak
and dc output current is given by:
I PEAK
=
IOUT
+ VOUT
×
2
VIN(MAX) VOUT
× f × L × VIN(MAX)
(2)
At a given current comparator threshold VTH and MOSFET
RDS(ON), the maximum inductor peak current is:
I PEAK
=
VTH
RDS(ON )
(3)
Rearranging Equation 2 to solve for IOUT(MAX) gives:
IOUT( MAX )
=
VTH
RDS(ON )
VOUT
×
2
VIN(MAX) VOUT
× f × L × VIN(MAX)
(4)
Normally, VTH should be set to its maximum value of 144 mV.
For example, in the circuit of Figure 19, an Si4410, which has
an RDS(ON) of 13.5 mwould have a maximum peak current
limit of around 10 A. A less efficient way to achieve maximum
power from the converter is to design the inductor with a larger
inductance, (i.e., a lower ripple current). This helps reduce
the peak-to-dc current ratio and increases maximum converter
output, but may also increase the inductor value and its size.
It is important to remember that this current limit circuit is
designed to protect against high current or short circuit condi-
tions only. This will protect the IC and MOSFETs long enough
to allow the output undervoltage protection circuitry to latch off
the supply.
12
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