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PDF ADN2809 Data sheet ( Hoja de datos )
| Número de pieza | ADN2809 | |
| Descripción | Multi-Rate to 2.7Gbps Clock and Data Recovery IC with Limiting Amplifier | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
Multi-Rate to 2.7Gbps Clock and Data
Recovery IC with Limiting Amplifier
Preliminary Technical Data
ADN2809
FEATURES
Meets SONET Requirements for Jitter Transfer /
Generation / Tolerance
Quantizer Sensitivity: 6 mV typical
• Adjustable Slice Level: +/- 100 mV
• 1.9GHz minimum Bandwidth
Loss of Signal Detect Range: 4mV to 17mV
Single Reference Clock Frequency for all rates
Including 15/14 (7%) Wrapper Rate
• Choice of 19.44, 38.88, 77.76 or
155.52MHz
LVPECL / LVDS / LVCMOS / LVTTL compatible
inputs (LVPECL / LVDS only at 155.52 MHz)
19.44MHz Crystal Oscillator for Module apps
Loss of Lock indicator
Loopback mode for High Speed Test Data
Output Squelch & Clock Recovery Functions
Single Supply Operation: 3.3 Volts (+10%)
Low Power: 780 mW Typical
Patented Clock Recovery Architecture
7 x 7 mm 48 pin LFCSP
APPLICATIONS
SONET OC-3/12/48, SDH STM-1/4/16, and all
associated FEC rates
WDM transponders
SONET/SDH regenerators and test equipment
Backplane applications
PRODUCT DESCRIPTION
The ADN2809 provides the receiver functions of Quantization,
Signal Level Detect and Clock and Data Recovery at rates of
OC-3, OC-12, Gigabit Ethernet, OC-48 and all FEC rates. All
SONET jitter requirements are met, including: Jitter Transfer;
Jitter Generation; and Jitter Tolerance. All specifications are
quoted for -40 to 85C ambient temperature unless otherwise
noted.
The device is intended for WDM system applications and can be
used with either an external reference clock or an on-chip
oscillator crystal. Both native rates and 15/14 rate digital
‘wrappers’ rates are supported by the ADN2809, without any
change of reference clock required.
This device together with a PIN diode and a TIA preamplifier
can implement a highly integrated, low cost, low power fiber
optic receiver.
The receiver front end Signal Detect circuit indicates when the
input signal level has fallen below a user adjustable threshold.
The ADN2809 is available in a compact 48 pin chip scale
package.
Loss of lock
CF
Functional Block Diagr am
REV. PrB Sept 2001
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781/329-4700
w w w .an al o g .c o m
Fax: 781/326-8703
©Analog Devices, Inc., 2001
1 page  
ADN2809
Rate
OC48
GbE
OC12
OC3
J itter Tr ansfer
SONET
Spec
2MHz
ADN2809
370kHz
1MHz
185kHz
500kHz
130kHz
93kHz
23kHz
Ma r gin
5.4
5.4
5.4
5.6
J itter Toler ance
SONET
spec
1MHz
ADN2809
4.77MHz
500kHz
4.77MHz
250kHz
65kHz
4.77MHz
4.77MHz
Ma r gin
4.8
9.6
19.2
73.4
Table I. Typical Jitter Transfer and Jitter Tolerance Performance
FIGURE 5: ADN2809 JITTER FILTERING & TRACKING BANDWIDTH
OC3_jit_tolerance
GBE_jit_tolerance
OC3_jit_transfer
0 GBE_jit_transfer
OC12_jit_tolerance
OC48_jit_tolerance
OC12_jit_transfer
OC48_jit_transfer
-.5
-1
-1.5
-2
-2.5
-3
-3.5
-4
-4.5
dB -5
-5.5
-6
-6.5
-7
-7.5
-8
-8.5
-9
-9.5
-10
1e3 1e4 1e5 1e6 1e7
freq, Hertz
Figure 5. Tracking Bandwidth and Jitter Filtering
1e8
REV. PrB Oct. .2001
-5-
5 Page 
ADN2809
SEL2
0
0
0
0
1
1
1
1
SEL0
0
0
1
1
0
0
1
1
TABLE 2. Data Rate Selection
SEL1 Rate
0 OC48
1 Gigabit Ethernet
0 OC12
1 OC3
0 OC48 * 15/14
1 Gigabit Ethernet * 15/14
0 OC12 * 15/14
1 OC3 * 15/14
Fr equency
2.48832 GHz
1.25 GHz
622.08 MHz
155.52 MHz
2.666 GHz
1.339 GHz
666.51 MHz
166.63 MHz
TABLE 3. Refer ence Fr equency Selection
REFSEL1
REFSEL0 Applied Refer ence Fr equency
0 0 19.44 MHz
0 1 38.88 MHz
1 0 77.76 MHz
1 1 155.52 MHz
TABLE 4. Cr ystal Specification - see note (3)
Par ameter
Value
Mode
Series Resonant
Frequency / Overall Stability
19.44 MHz / +/- 50 ppm
Frequency Accuracy
Temp. Stability
+/- 50 ppm / total Temp. Stability
Ageing
ESR 20 ohms max
(3) No additional external components are required
TABLE 5. Recommended Capacitor Specification
Par ameter
Value
Capacitance
(-40C to 85C) >3.0uF
Leakage
(-40C to 85C) <80nA
Rating
>6.3V
REV. PrB Oct. .2001
- 11 -
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ADN2809.PDF ] | |
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