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PDF ADM811 Data sheet ( Hoja de datos )
| Número de pieza | ADM811 | |
| Descripción | Microprocessors Supervisory Circuit in 4-Lead SOT-143 | |
| Fabricantes | Analog Devices | |
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Microprocessors
Supervisory Circuit in 4-Lead SOT-143
ADM811/ADM812
FEATURES
Superior Upgrade for MAX811/MAX812
Specified Over Temperature
Low Power Consumption (5 A Typ)
Precision Voltage Monitor: +3 V, +3.3 V, +5 V Options
Reset Assertion Down to 1 V VCC
140 ms Min Power-On Reset
Logic Low RESET Output (ADM811)
Logic High RESET Output (ADM812)
Built-In Manual Reset
APPLICATIONS
Microprocessor Systems
Controllers
Intelligent Instruments
Automotive Systems
Safety Systems
Portable Instruments
FUNCTIONAL BLOCK DIAGRAM
VCC
VREF
ADM811/ADM812
RESET
GENERATOR
RESET/RESET
MR DEBOUNCE
GND
GENERAL DESCRIPTION
The ADM811/ADM812 are reliable voltage monitoring devices
suitable for use in most voltage monitoring applications.
The ADM811/ADM812 are designed to monitor five different
voltages, each allowing for a 5% or 10% degradation of standard
PSU voltages before a reset occurs. These voltages have been
selected for the effective monitoring of +3 V, +3.3 V and +5 V
supply voltage levels.
Included in this circuit is a debounced Manual Reset input.
Reset can be activated using an electrical switch (or an input
from another digital device) or by a degradation of the supply
voltage. The Manual Reset function is very useful especially if
the circuit in which the ADM811/ADM812 is operating enters
into a state that can only be detected by the user. Allowing the
user to manually reset a system can reduce the damage or dan-
ger that could be otherwise caused by an out-of-control or
locked up system.
VCC
ADM811
MR RESET
GND
VCC
P
SYSTEM
RESET
100k⍀
GND
Figure 1. Typical Operating Circuit
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
1 page  
ADM811/ADM812
CIRCUIT INFORMATION
RESET THRESHOLDS
The reset output provides a RESET (for the ADM811) or a
RESET (for the ADM812) output to the microprocessor when-
ever the VCC input is below the reset threshold. The actual reset
threshold is dependant on whether a L, M, T, S or R suffix is
used. Please refer to Table I.
Table I. Reset Threshold Options
Model
RESET
Threshold
ADM811LART
ADM811MART
ADM811TART
ADM811-3TART
ADM811SART
ADM811RART
4.63 V
4.38 V
3.08 V
3.08 V
2.93 V
2.63 V
ADM812LART
ADM812MART
ADM812TART
ADM812SART
ADM812RART
4.63 V
4.38 V
3.08 V
2.93 V
2.63 V
Parts in bold type are ex-stock, please contact factory for availability.
RESET OUTPUT
On power-up and after VCC rises above the reset threshold, an
internal timer holds the reset output active for 240 ms (typical).
This is intended as a power-on reset signal for the processor. It
allows time for both the power supply and the microprocessor
to stabilize after power-up. If a power supply brownout or inter-
ruption occurs, the reset output is similarly activated and re-
mains active for 240 ms (typical) after the supply recovers. This
allows time for the power supply and microprocessor to stabilize.
The ADM811 provides an active low reset output (RESET)
while the ADM812 provides an active high output (RESET).
During power-down of the ADM811, the RESET output re-
mains valid (low) with VCC as low as 1 V. This ensures that the
microprocessor is held in a stable shutdown condition as the
supply falls and also ensures that no spurious activity can occur
via the µP as it powers up.
MANUAL RESET
The ADM811/ADM812 is equipped with a manual reset input.
This input is designed to operate in a noisy environment where
unwanted glitches could be induced. These glitches could be
produced by the bouncing action of a switch contact or where a
Manual Reset switch may be located some distance away from
the circuit (the cabling of which may pickup noise).
The Manual Reset input is guaranteed to ignore logically valid
inputs which are faster than 100 ns and accept inputs longer in
duration than 10 µs.
GLITCH IMMUNITY
The ADM811/ADM812 contain internal filtering circuitry
providing glitch immunity from fast transient glitches on the
power supply line.
VCC
VREF
VREF
VREF
RESET
t1
t1
t1 = RESET TIME = 240ms TYPICAL
VREF = RESET VOLTAGE THRESHOLD
Figure 8. Power Fail RESET Timing
VREF
INTERFACING TO OTHER DEVICES
Output
The ADM811/ADM812 series is designed to integrate with
as many devices as possible. One feature of the ADM811/
ADM812 is the reset output, which is directly proportional to
VCC (this is guaranteed only while VCC is greater than 1 V). This
enables the part to be used in both 3 V and 5 V or any nominal
voltage within the minimum and maximum specifications for VCC.
THE BENEFITS OF A VERY ACCURATE RESET
THRESHOLD
Because the ADM811/ADM812 series can operate effectively
even when there are large degradations of the supply voltages,
the possibility of a malfunction during a power failure is greatly
reduced. Another advantage of the ADM811/ADM812 series is
its very accurate internal voltage reference circuit. Combined,
these benefits produce an exceptionally reliable Microprocessor
Supervisory Circuit.
VCC
VCC
ADM811
RESET
GND
Figure 9. Ensuring a Valid RESET Output Down to
VCC = 0 V
ENSURING A VALID RESET OUTPUT DOWN TO
VCC = 0 V
When VCC falls below 0.8 V, ADM811s RESET no longer sinks
current. Therefore, a high impedance CMOS logic input con-
nected to RESET may drift to undetermined logic levels. To
eliminate this problem a 100 kΩ resistor should be connected
from RESET to ground.
REV. 0
–5–
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet ADM811.PDF ] | |
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