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ADM3485E Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADM3485E
Beschreibung EIA RS-485/RS-422 Transceiver
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 17 Seiten
ADM3485E Datasheet, Funktion
±15 kV ESD-Protected, 3.3 V,12 Mbps,
EIA RS-485/RS-422 Transceiver
ADM3485E
FEATURES
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins
12 Mbps data rate
Half-duplex transceiver
Up to 32 nodes on the bus
Receiver open-circuit, fail-safe design
Low power shutdown current
Outputs high-Z when disabled or powered off
Common-mode input range: −7 V to +12 V
Thermal shutdown and short-circuit protection
Industry-standard 75176 pinout
8-lead narrow SOIC package
APPLICATIONS
Power/energy metering
Telecommunications
EMI-sensitive systems
Industrial control
Local area networks
GENERAL DESCRIPTION
The ADM3485E is a 3.3 V, low power data transceiver with
±15 kV ESD protection, suitable for half-duplex communi-
cation on multipoint bus transmission lines. The ADM3485E
is designed for balanced data transmission and complies with
TIA/EIA standards RS­485 and RS-422. The ADM3485E is a
half-duplex transceiver that shares differential lines and has
separate enable inputs for the driver and the receiver.
The devices have a 12 kΩ receiver input impedance, which
allows up to 32 transceivers on a bus. Because only one driver
FUNCTIONAL BLOCK DIAGRAM
ADM3485E
RO R
RE
DE
DI D
B
A
Figure 1.
should be enabled at any time, the output of a disabled or
powered-down driver is tristated to avoid overloading the bus.
The receiver has a fail-safe feature that ensures a logic high
output when the inputs are floating. Excessive power dissipation
caused by bus contention or by output shorting is prevented
with a thermal shutdown circuit.
The part is fully specified over the industrial temperature range
and is available in an 8-lead narrow SOIC package.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2000-2010 Analog Devices, Inc. All rights reserved.






ADM3485E Datasheet, Funktion
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VCC to GND
Digital Input/Output Voltage (DE, RE, DI)
Receiver Output Voltage (RO)
Driver Output (A, B)/
Receiver Input (A, B) Voltage
Driver Output Current
Power Dissipation (8-Lead SOIC_N)
Operating Temperature Range
Storage Temperature Range
Lead Temperature, Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
ESD Rating
Human Body Model (A, B)
Values
–0.3 V to +6 V
–0.3 V to +6 V
–0.3 V to (VCC + 0.3 V)
−8 V to +13 V
±250 mA
650 mW
–40°C to +85°C
–65°C to +150°C
300°C
215°C
220°C
±15 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADM3485E
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
8-Lead SOIC_N
θJA
158
Unit
°C/W
ESD CAUTION
Rev. D | Page 5 of 16

6 Page









ADM3485E pdf, datenblatt
STANDARDS AND TESTING
Table 6 compares RS-422 and RS-485 interface standards, and
Table 7 and Table 8 show transmitting and receiving truth tables.
Table 6.
Specification
Transmission Type
Maximum Data Rate
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
Number of Drivers/Receivers per Line
RS-422
Differential
10 Mbps
4000 ft
±2 V
100 Ω
4 kΩ min
±200 mV
−7 V to +7 V
1/10
RS-485
Differential
10 Mbps
4000 ft
±1.5 V
54 Ω
12 kΩ min
±200 mV
−7 V to +12 V
32/32
Table 7. Transmitting Truth Table
Transmitting Inputs
Transmitting Outputs
RE DE DI B
A
X1 1
10
1
X1 1
01
0
00
X1 High-Z2
High-Z2
10
X1 High-Z2
High-Z2
1 X = don't care.
2 High-Z = high impedance.
Table 8. Receiving Truth Table
Receiving Inputs
Receiving Outputs
RE DE
A–B
RO
0
X1
> +0.2 V
1
0
X1
< –0.2 V
0
0
X1
Inputs open
1
1 X1 X1
High-Z2
1 X = don't care.
2 High-Z = high impedance.
ESD TESTING
Two coupling methods are used for ESD testing, contact
discharge and air-gap discharge. Contact discharge calls for a
direct connection to the unit being tested. Air-gap discharge
uses a higher test voltage but does not make direct contact with
the unit under test. With air-gap discharge, the discharge gun is
moved toward the unit under test, developing an arc across the
air gap, hence the term air-gap discharge. This method is
ADM3485E
influenced by humidity, temperature, barometric pressure,
distance, and rate of closure of the discharge gun. The contact
discharge method, while less realistic, is more repeatable and is
gaining acceptance and preference over the air-gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or
heating. Even if catastrophic failure does not occur immediately,
the device can suffer from parametric degradation, which can
result in degraded performance. The cumulative effects of
continuous exposure can eventually lead to complete failure.
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I/O port. It is extremely important,
therefore, to have high levels of ESD protection on the I/O lines.
The ESD discharge could induce latch-up in the device under
test, so it is important that ESD testing on the I/O pins be
carried out while device power is applied. This type of testing is
more representative of a real-world I/O discharge, where the
equipment is operating normally when the discharge occurs.
Table 9. ESD Test Results
ESD Test Method
Human Body Model
I/O Pins
±15 kV
100%
90%
36.8%
10%
tRL tDL
TIME t
Figure 24. Human Body Model Current Waveform
Rev. D | Page 11 of 16

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