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ADM1026 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADM1026
Beschreibung Complete Thermal and System Management Controller
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADM1026 Datasheet, Funktion
PRELIMINARY TECHNICAL DATA
=
Preliminary Technical Data
Complete Thermal and System
ManagementController
ADM1026
FEATURES
Up to 19 Analog Measurement Channels (Including Inter-
nal Measurements)
Chassis Intrusion Detection
Interrupt Output (SMBAlert)
Reset Input, Reset Outputs
Up to 8 Fan Speed Measurement Channels
Thermal Interrupt (THERM) Output
Up to 17 General-Purpose Logic I/O Pins
Shutdown Mode to Minimize Power Consumption
Remote Temperature Measurement with Remote Diode
Limit Comparison of all Monitored Values
(Two Channels)
On-Chip Temperature Sensor
Analog and PWM Fan Speed Control Outputs
2-wire serial System Management Bus (SMBus)
8K bytes on-chip E2PROM
APPLICATIONS
Network Servers and Personal Computers
Telecommunications Equipment
Test Equipment and Measuring Instruments
Full SMBus 1.1 support including Packet Error Checking
(PEC)
FUNCTIONAL BLOCK DIAGRAM
ADD/
NTESTOUT
SDA
SCL 3.3VSTBY
3.3V MAIN
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
GPIO8
F A N 7 /G P IO 7
F A N 6 /G P IO 6
FAN5GPIO5
F A N 4 /G P IO 4
F A N 3 /G P IO 3
F A N 2 /G P IO 2
F A N 1 /G P IO 1
F A N 0 /G P IO 0
+VBAT(0 - +4.0V)
+5VIN(0 - +6.66V)
-12VIN(0 - -16V)
+12VIN(0 - +16V)
+V CCPIN(0 - +3V )
AIN0(0 - +3V)
AIN1(0 - +3V)
AIN2(0 - +3V)
AIN3(0 - +3V)
AIN4(0 - +3V)
AIN5(0 - +3V)
AIN6(0 - +2.5V)
AIN7(0 - +2.5V)
D2+/AIN8(0 - +2.5V)
D2-/AIN9(0 - +2.5V)
D1+
D 1-/N TE S TIN
BANDGAP
TEMP. SENSOR
GPIO
REGISTERS
SERIAL BUS
IN TE R FA C E
R ESET IN
3.3V MAIN
RESET
GENE RATO R
FAN SPEED
COUNTER
IN P UT
ATTENUATORS
AND
AN ALO G
MULTIPLEX ER
ADD RES S
PO INT E R
RE G IS T ER
8KBYTES
E2PROM
TE MP E RAT UR E
CO N F IG U R AT IO N
RE G IS T ER
ADM1026
8-BIT ADC
BANDGAP
REFERENCE
VCC
3.3V STBY
RESET
GENE RATO R
PWM REGISTER
AND CONTROLLER
VALUE AND
LIM IT
RE GIS TE RS
LIM IT
CO M PA RA TO RS
IN T E RR U P T
STATUS
RE GIS TE RS
INT MASK
RE GIS TE RS
IN T E RR U P T
MASKING
CO N F IG U R AT IO N
RE GISTE RS
AN ALO G
OUTPUT REGISTER
AND 8-B IT DAC
TO G P IO
REGISTERS
R ESE T M A IN
R ESETST B Y
PWM
CI
INT
G P IO 1 6/T H E R M
DAC
REV. PrP 9/01
AGND DGND VREF (1.82V OR 2.5V)
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001






ADM1026 Datasheet, Funktion
ADM1026
PRELIMINARY TECHNICAL DATA
PIN FUNCTION DESCRIPTION (CONTINUED)
PIN NO. MNEMONIC TYPE
DESCRIPTION
21 AGND
Ground
Ground pin for analog circuits
22 3.3V STBY
Power Supply
Supplies 3.3V power for the ADM1026. Also monitors 3.3V standby
power rail.
23 DAC
Analog Output 0 to 2.5V output for analog control of fan speed.
24 VREF
Analog Output Reference voltage output. Can be selected as 1.8V (default) or 2.5V.
25 D1-/NTESTIN Analog Input Connected to cathode of 1st remote temperature sensing diode. If held
high at power up it activates NAND tree test mode.
26 D1+
Analog Input Connected to anode of 1st remote temperature sensing diode.
27 D2-/AIN9
Programmable Connected to cathode of 2nd remote temperature sensing diode, or
Analog Input may be re-configured as a 0 - 2.5V analog input
28 D2+/AIN8
Programmable Connected to anode of 2nd remote temperature sensing diode, or
Analog Input may be re-configured as a 0 - 2.5V analog input
29 VBAT
30 +5VIN
31 -12VIN
32 +12VIN
33 +VCCP
34 AIN7
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Monitors battery voltage, nominally +3V.
Monitors +5 V supply.
Monitors -12 V supply.
Monitors +12 V supply.
Monitors processor core voltage (0 to 3.0V).
General-purpose 0 to 2.5V analog input.
35 AIN6
Analog Input General-purpose 0 to 2.5V analog input.
36 AIN5
Analog Input General-purpose 0 to 3V analog input.
37 AIN4
Analog Input General-purpose 0 to 3V analog input.
38 AIN3
Analog Input General-purpose 0 to 3V analog input.
39 AIN2
Analog Input General-purpose 0 to 3V analog input.
40 AIN1
Analog Input General-purpose 0 to 3V analog input.
41 AIN0
Analog Input General-purpose 0 to 3V analog input.
42 GPIO16/
THERM
43 GPIO15
Digital I/O1
Digital I/O1
General purpose I/O pin can be configured as a digital input or output.
Can also be configured as a bidirectional THERM pin (open drain).
General purpose I/O pin can be configured as a digital input or output.
44 GPIO14
Digital I/O1
General purpose I/O pin can be configured as a digital input or output.
45 GPIO13
Digital I/O1
General purpose I/O pin can be configured as a digital input or output.
46 GPIO12
Digital I/O1
General purpose I/O pin can be configured as a digital input or output.
47 GPIO11
Digital I/O1
General purpose I/O pin can be configured as a digital input or output.
48 GPIO10
Digital I/O1
NOTES
1 GPIO pins are open-drain and require external pullup resistors.
General purpose I/O pin can be configured as a digital input or output.
–6– REV. PrP

6 Page









ADM1026 pdf, datenblatt
PRELIMINARY TECHNICAL DATA
ADM1026
write byte/word operation. This is illustrated in Figure 4g.
When reading from EEPROM, Bit 0 of EEPROM
register 3 must be set.
12
34
S SLAVE R
ADDRESS
A
DATA
56
AP
Note: Although the ADM1026 supports Packet Error
Checking (PEC), its use is optional. The PEC byte is
calculated using CRC-8. The Frame Check Sequence
(FCS) conforms to CRC-8 by the polynomial:-
C(x) = x8 + x2 + x1 + 1
Consult SMBus 1.1 specification for more information.
Figure 4g. Single Byte Read From EEPROM Or RAM
BLOCK READ
In this operation the master device reads a block of data
from a slave device. The start address for a block read
must previously have been set. In the case of the
ADM1026 this is done by a Send Byte operation to set a
RAM address, or a Write Byte/Word operation to set an
EEPROM address. The block read operation itself
consists of a Send Byte operation that sends a block read
command to the slave, immediately followed by a repeated
start and a read operation that reads out multiple data
bytes, as follows:
1.The master device asserts a START condition on SDA.
2.The master sends the 7-bit slave address followed by the
write bit (low).
MEASUREMENT INPUTS
The ADM1026 has 17 external analog measurement pins,
which can be configured to perform various functions. It
also measures two supply voltages, 3.3V MAIN and 3.3V
STBY, and the internal chip temperature.
Pins 25 and 26 are dedicated to remote temperature mea-
surement, whilst pins 27 and 28 can be configured as ana-
log inputs with a range of 0 to +2.5V or as inputs for a
second remote temperature sensor.
Pins 29 to 33 are dedicated to measuring VBAT, +5V,
-12V, +12V supplies and the processor core voltage VCCP.
The remaining analog inputs, pins 34 to 41 are general-
purpose analog inputs with a range of 0 to +2.5V (pins 34
and 35) or 0 to +3V (pins 36 to 41).
3.The addressed slave device asserts ACK on SDA.
A TO D CONVERTER
4.The master sends a command code that tells the slave
device to expect a block read. The ADM1026 command
code for a block read is A1h (10100001).
5.The slave asserts ACK on SDA.
6.The master asserts a repeat start condition on SDA.
7.The master sends the 7-bit slave address followed by the
read bit (high).
8.The slave asserts ACK on SDA.
9.The ADM1026 sends a byte count data byte that tells
the master how many data bytes to expect. The ADM1026
will always return 32 data bytes (20h), which is the
maximum allowed by the SMBus 1.1 specification.
10. The master asserts ACK on SDA.
11. The master receives 32 data bytes.
12. The master asserts ACK on SDA after each data byte.
13. The ADM1026 issues a PEC byte to the master. The
master should check the PEC byte and issue another block
read if the PEC byte is incorrect.
14. A NACK is generated after the PEC byte to signal the
end of the read.
15. The master asserts a STOP condition on SDA to end
the transaction.
12
3
4
56
7
8 9 10 11 12
S
SLAVE
W
ADDRESS
A
COMMAND A1h
(BLOCK READ)
A
S
SLAVE
ADDRESS
R
A
BYTE
COUNT
A
DATA 1 A
13 14 15
DATA A PEC A P
32
Figure 4h. Block Read From EEPROM or RAM
When block reading from EEPROM, bit 0 of EEPROM
register 3 must be set.
These inputs are multiplexed into the on-chip, successive
approximation, analog-to-digital converter. This has a
resolution of 8 bits. The basic input range is zero to
+2.5V, which is the input range of AIN6 to AIN9, but five of
the inputs have built-in attenuators to allow measurement
of VBAT, +5V, -12V, +12V and the processor core voltage
VCCP, without any external components. To allow for the
tolerance of these supply voltages, the A to D converter
produces an output of 3/4 full-scale (decimal 192) for the
nominal input voltage, and so has adequate headroom to
cope with overvoltages. Table 2 shows the input ranges of
the analog inputs and output codes of the A to D con-
verter.
When the ADC is running, it samples and converts an ana-
log or local temperature input every 711µs (typical value).
Each input is measured 16 times and the measurements
averaged to reduce noise, so the total conversion time for
each input is 11.38ms.
Measurements on the remote temperature (D1 and D2) in-
puts take 2.13ms. These are also measured 16 times and
averaged, so the total conversion time for a remote tem-
perature input is 34.13ms.
INPUT CIRCUITS
The internal structure for the analog inputs are shown in
Figure 5. Each input circuit consists of an input protec-
tion diode, an attenuator, plus a capacitor to form a first-
order lowpass filter which gives the input immunity to
high frequency noise. The -12V input also has a resistor
connected to the on-chip reference to offset the negative
voltage range so that it is always positive and can be
handled by the ADC. The VBAT input allows the condition
of a battery such as a CMOS backup battery to be moni-
tored. To reduce current drain from the battery, the lower
resistor of the VBAT attenuator is not connected, except
when a VBAT measurement is being made. The total
–12–
REV. PrP

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