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PDF ADUC836 Data sheet ( Hoja de datos )
| Número de pieza | ADUC836 | |
| Descripción | MicroConverter/ Dual 16-Bit-ADCs with Embedded 62 kB Flash MCU | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADUC836 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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MicroConverter®, Dual 16-Bit -
ADCs with Embedded 62 kB Flash MCU
ADuC836
FEATURES
High Resolution - ADCs
2 Independent ADCs (16-Bit Resolution)
16-Bit No Missing Codes, Primary ADC
16-Bit rms (16-Bit p-p) Effective Resolution @ 20 Hz
Offset Drift 10 nV/C, Gain Drift 0.5 ppm/C
Memory
62 Kbytes On-Chip Flash/EE Program Memory
www.DataSheet4U.co4mKbytes On-Chip Flash/EE Data Memory
Flash/EE, 100 Year Retention, 100 Kcycles Endurance
3 Levels of Flash/EE Program Memory Security
In-Circuit Serial Download (No External Hardware)
High Speed User Download (5 Seconds)
2304 Bytes On-Chip Data RAM
8051 Based Core
8051 Compatible Instruction Set
32 kHz External Crystal
On-Chip Programmable PLL (12.58 MHz Max)
3 16-Bit Timer/Counter
26 Programmable I/O Lines
11 Interrupt Sources, 2 Priority Levels
Dual Data Pointer, Extended 11-Bit Stack Pointer
On-Chip Peripherals
Internal Power on Reset Circuit
12-Bit Voltage Output DAC
Dual 16-Bit - DACs/PWMs
On-Chip Temperature Sensor
Dual Excitation Current Sources
Time Interval Counter (Wake-Up/RTC Timer)
UART, SPI®, and I2C® Serial I/O
High Speed Baud Rate Generator (Including 115,200)
Watchdog Timer (WDT)
Power Supply Monitor (PSM)
Power
Normal: 2.3 mA Max @ 3.6 V (Core CLK = 1.57 MHz)
Power-Down: 20 A Max with Wake-Up Timer Running
Specified for 3 V and 5 V Operation
Package and Temperature Range
52-Lead MQFP (14 mm 14 mm), –40C to +125C
56-Lead LFCSP (8 mm 8 mm), –40C to +85C
APPLICATIONS
Intelligent Sensors
Weigh Scales
Portable Instrumentation, Battery-Powered Systems
4–20 mA Transmitters
Data Logging
Precision System Monitoring
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or other-
wise under any patent or patent rights of Analog Devices.Trademarks and
registered trademarks are the property of their respective companies.
AIN1
AIN2
AIN3
AIN4
AIN5
REFIN–
REFIN+
RESET
DVDD
DGND
FUNCTIONAL BLOCK DIAGRAM
AVDD ADuC836
MUX
BUF
PGA
PRIMARY
16-BIT - ADC
AVDD
CURRENT
SOURCE
12-BIT
DAC
BUF
IEXC1
IEXC2
DAC
MUX
AGND
TEMP
SENSOR
AUXILIARY
16-BIT - ADC
DUAL
16-BIT
- DAC
DUAL
16-BIT
PWM
MUX
EXTERNAL
VREF
DETECT
INTERNAL
BAND GAP
VREF
POR
8051-BASED MCU WITH ADDITIONAL
PERIPHERALS
62 KBYTES FLASH/EE PROGRAM MEMORY
4 KBYTES FLASH/EE DATA MEMORY
2304 BYTES USER RAM
PLL AND PROG
CLOCK DIV
3 16 BIT TIMERS
BAUD R ATE TIMER
POWER SUPPLY MON
WATCHDOG TIMER
OSC
WAKE- UP/
RTC TIMER
4 PARALLEL
PORTS
UART, SPI, AND I2C
SERIAL I/O
PWM0
PWM1
XTAL1 XTAL2
GENERAL DESCRIPTION
The ADuC836 is a complete smart transducer front end, integrating
two high resolution - ADCs, an 8-bit MCU, and program/data
Flash/EE memory on a single chip.
The two independent ADCs (primary and auxiliary) include a
temperature sensor and a PGA (allowing direct measurement
of low level signals).The ADCs with on-chip digital filtering and
programmable output data rates are intended for the measure-
ment of wide dynamic range, low frequency signals, such as those
in weigh scale, strain gage, pressure transducer, or temperature
measurement applications.
The device operates from a 32 kHz crystal with an on-chip PLL
generating a high frequency clock of 12.58 MHz. This clock is
routed through a programmable clock divider from which the MCU
core clock operating frequency is generated. The microcontroller
core is an 8052 and therefore 8051 instruction set compatible
with 12 core clock periods per machine cycle.
62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes of
nonvolatile Flash/EE data memory, and 2304 bytes of data RAM
are provided on-chip. The program memory can be configured as
data memory to give up to 60 Kbytes of NV data memory in data
logging applications.
On-chip factory firmware supports in-circuit serial download and
debug modes (via UART), as well as single-pin emulation mode
via the EA pin. The ADuC836 is supported by a QuickStart™
development system featuring low cost software and hardware
development tools.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
1 page  
Parameter
ADuC836
TRANSDUCER BURNOUT CURRENT SOURCES
AIN+ Current
–100
AIN– Current
+100
Initial Tolerance @ 25°C
Drift
EXCITATION CURRENT SOURCES
Output Current
Initial Tolerance @ 25°C
Drift
Initial Current Matching @ 25°C
www.DataSheet4UD.rcioftmMatching
Line Regulation (AVDD)
Load Regulation
Output Compliance2
LOGIC INPUTS
All Inputs Except SCLOCK, RESET,
and XTAL12
VINL, Input Low Voltage
VINH, Input High Voltage
SCLOCK and RESET Only
(Schmitt-Triggered Inputs)2
VT+
VT–
VT+ – VT–
Input Currents
Port 0, P1.2–P1.7, EA
SCLOCK, MOSI, MISO, SS13
RESET
±10
0.03
–200
±10
200
±1
20
1
0.1
AVDD – 0.6
AGND
0.8
0.4
2.0
1.3/3
0.95/2.5
0.8/1.4
0.4/1.1
0.3/0.85
0.3/0.85
±10
–10 min, –40 max
±10
±10
35 min, 105 max
P1.0, P1.1, Ports 2 and 3
Input Capacitance
±10
–180
–660
–20
–75
5
CRYSTAL OSCILLATOR (XTAL1 AND XTAL2)
Logic Inputs, XTAL1 Only2
VINL, Input Low Voltage
0.8
0.4
VINH, Input High Voltage
3.5
2.5
XTAL1 Input Capacitance
18
XTAL2 Output Capacitance
18
ADuC836
Test Conditions/Comments
Unit
AIN+ Is the Selected Positive Input
to the Primary ADC
AIN– Is the Selected Negative Input
to the Auxiliary ADC
nA typ
nA typ
% typ
%/°C typ
Available from Each Current Source
Matching between Both Current Sources
AVDD = 5 V + 5%
A typ
% typ
ppm/°C typ
% typ
ppm/°C typ
A/V typ
A/V typ
V max
V min
DVDD = 5 V
DVDD = 3 V
V max
V max
V min
DVDD = 5 V
DVDD = 3 V
DVDD = 5 V
DVDD = 3 V
DVDD = 5 V
DVDD = 3 V
VIN = 0 V or VDD
VIN = 0 V, DVDD = 5 V, Internal Pull-Up
VIN = VDD, DVDD = 5 V
VIN = 0 V, DVDD = 5 V
VIN = VDD, DVDD = 5 V,
Internal Pull-Down
VIN = VDD, DVDD = 5 V
VIN = 2 V, DVDD = 5 V
VIN = 450 mV, DVDD = 5 V
All Digital Inputs
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
V min/V max
A max
A min/A max
A max
A max
A min/A max
A max
A min
A max
A min
A max
pF typ
DVDD = 5 V
DVDD = 3 V
DVDD = 5 V
DVDD = 3 V
V max
V max
V min
V min
pF typ
pF typ
REV. A
–5–
5 Page 
ADuC836
PIN FUNCTION DESCRIPTIONS (continued)
Pin No. Pin No.
52-Lead 56-Lead
MQFP CSP Mnemonic
Type* Description
P1.4/AIN1
I Primary ADC, Positive Analog Input
P1.5/AIN2
I Primary ADC, Negative Analog Input
P1.6/AIN3
I Auxiliary ADC Input or Muxed Primary ADC, Positive Analog Input
P1.7/AIN4/DAC I/O Auxiliary ADC Input or Muxed Primary ADC, Negative Analog Input. The voltage
output from the DAC can also be configured to appear at this pin.
5 4, 5 AVDD
6 6, 7, 8 AGND
S Analog Supply Voltage, 3 V or 5 V
S Analog Ground. Ground reference pin for the analog circuitry.
79
REFIN(–)
I Reference Input, Negative Terminal
www.DataShee8t4U.com 10
REFIN(+)
I Reference Input, Positive Terminal
13 15
SS
I Slave Select Input for the SPI Interface. A weak pull-up is present on this pin.
14 16
MISO
I/O Master Input/Slave Output for the SPI Interface. A weak pull-up is present on this input pin.
15 17
RESET
I Reset Input. A high level on this pin for 16 core clock cycles while the oscillator is
running resets the device. There is an internal weak pull-down and a Schmitt trigger
input stage on this pin.
16–19, 18–21,
22–25 24–27
P3.0–P3.7
I/O
P3.0/RXD
I/O
P3.1/TXD
I/O
P3.2/INT0
I/O
P3.3/INT1
I/O
P3.4/T0/PWMCLK I/O
P3.5/T1
P3.6/WR
I/O
I/O
P3.7/RD
I/O
P3.0–P3.7 are bidirectional port pins with internal pull-up resistors. Port 3 pins that
have 1s written to them are pulled high by the internal pull-up resistors, and in that
state can be used as inputs. As inputs, Port 3 pins being pulled externally low will
source current because of the internal pull-up resistors. When driving a 0-to-1 output
transition, a strong pull-up is active for two core clock periods of the instruction
cycle. Port 3 pins also have various secondary functions including:
Receiver Data for UART Serial Port
Transmitter Data for UART Serial Port
External Interrupt 0. This pin can also be used as a gate control input to Timer 0.
External Interrupt 1. This pin can also be used as a gate control input to Timer 1.
Timer/Counter 0 External Input. If the PWM is enabled, an external clock may be
input at this pin.
Timer/Counter 1 External Input
External Data Memory Write Strobe. Latches the data byte from Port 0 into an
external data memory.
External Data Memory Read Strobe. Enables the data from an external data memory
to Port 0.
20, 34, 48 22, 36, 51, DVDD
21, 35, 47 23, 37, 38, DGND
50
S Digital Supply, 3 V or 5 V
S Digital Ground. Ground reference point for the digital circuitry.
26
SCLOCK
I/O Serial Interface Clock for either the I2C or SPI Interface. As an input, this pin is a
Schmitt-triggered input, and a weak internal pull-up is present on this pin unless it is
outputting logic low. This pin can also be directly controlled in software as a digital
output pin.
27 MOSI/SDATA I/O Serial Data I/O for the I2C Interface or Master Output/Slave Input for the
SPI Interface. A weak internal pull-up is present on this pin unless it is outputting
logic low. This pin can also be directly controlled in software as a digital output pin.
28–31 30–33
36–39 39–42
P2.0–P2.7
(A8–A15)
(A16–A23)
I/O Port 2 is a bidirectional port with internal pull-up resistors. Port 2 pins that have 1s
written to them are pulled high by the internal pull-up resistors, and in that state can
be used as inputs. As inputs, Port 2 pins being pulled externally low will source current
because of the internal pull-up resistors.
Port 2 emits the high order address bytes during fetches from external program memory
and middle and high order address bytes during accesses to the 24-bit external data
memory space.
32 34
XTAL1
I Input to the Crystal Oscillator Inverter
33 35
XTAL2
O Output from the Crystal Oscillator Inverter. (See the Hardware Design Considerations
section for description.)
REV. A
–11–
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADUC836.PDF ] | |
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