Datenblatt-pdf.com


ADSP-21065LKCA-264 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADSP-21065LKCA-264
Beschreibung DSP Microcomputer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 44 Seiten
ADSP-21065LKCA-264 Datasheet, Funktion
a
DSP Microcomputer
ADSP-21065L
SUMMARY
High Performance Signal Computer for Communica-
tions, Audio, Automotive, Instrumentation and
Industrial Applications
Super Harvard Architecture Computer (SHARC®)
Four Independent Buses for Dual Data, Instruction,
and I/O Fetch on a Single Cycle
32-Bit Fixed-Point Arithmetic; 32-Bit and 40-Bit Floating-
Point Arithmetic
544 Kbits On-Chip SRAM Memory and Integrated I/O
Peripheral
I2S Support, for Eight Simultaneous Receive and Trans-
mit Channels
KEY FEATURES
66 MIPS, 198 MFLOPS Peak, 132 MFLOPS Sustained
Performance
User-Configurable 544 Kbits On-Chip SRAM Memory
Two External Port, DMA Channels and Eight Serial
Port, DMA Channels
SDRAM Controller for Glueless Interface to Low Cost
External Memory (@ 66 MHz)
64M Words External Address Range
12 Programmable I/O Pins and Two Timers with Event
Capture Options
Code-Compatible with ADSP-2106x Family
208-Lead MQFP or 196-Ball Mini-BGA Package
3.3 Volt Operation
Flexible Data Formats and 40-Bit Extended Precision
32-Bit Single-Precision and 40-Bit Extended-Precision IEEE
Floating-Point Data Formats
32-Bit Fixed-Point Data Format, Integer and Fractional,
with Dual 80-Bit Accumulators
Parallel Computations
Single-Cycle Multiply and ALU Operations in Parallel with
Dual Memory Read/Writes and Instruction Fetch
Multiply with Add and Subtract for Accelerated FFT But-
terfly Computation
1024-Point Complex FFT Benchmark: 0.274 ms (18,221
Cycles)
CORE PROCESSOR
INSTRUCTION
CACHE
32 ؋ 48 BIT
DAG1
DAG2
8 ؋ 4 ؋ 32 8 ؋ 4 ؋ 24
PROGRAM
SEQUENCER
24 PM ADDRESS BUS
32 DM ADDRESS BUS
BUS
CONNECT
(PX)
48 PM DATA BUS
40 DM DATA BUS
DUAL-PORTED SRAM
TWO INDEPENDENT
DUAL-PORTED BLOCKS
PROCESSOR PORT
ADDR
DATA
ADDR
DATA
I/O PORT
DATA
ADDR
ADDR
DATA
IOA IOD
17 48
JTAG
TEST &
EMULATION
7
EXTERNAL
PORT
SDRAM
INTERFACE
ADDR BUS
MUX
24
MULTIPROCESSOR
INTERFACE
DATA BUS
MUX
32
HOST PORT
MULTIPLIER
DATA
REGISTER
FILE
16 ؋ 40 BIT
BARREL
SHIFTER
ALU
IOP
REGISTERS
(MEMORY MAPPED)
CONTROL,
STATUS, TIMER
&
DATA BUFFERS
DMA
CONTROLLER
SPORT 0
SPORT 1
I/O PROCESSOR
Figure 1. Functional Block Diagram
SHARC is a registered trademark of Analog Devices, Inc.
4
(2 Rx, 2Tx)
(I2S)
(2 Rx, 2Tx)
(I2S)
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000






ADSP-21065LKCA-264 Datasheet, Funktion
ADSP-21065L
ADSP-21065L
#2
CLKIN
ADDR23-0
RESET
DATA31-0
10
CLOCK
RESET
01
ID1-0
CONTROL
SPORT0
SPORT1
CPA
BR2
BR1
ADSP-21065L
#1
CLKIN
RESET
ID1-0
ADDR23-0
DATA31-0
SPORT0
RD
WR
SPORT1
CONTROL
ACK
MS3-0
BMS
SBTS
SW
CS
HBR
HBG
REDY
RAS
CAS
DQM
SDWE
SDCLK1-0
SDCKE
SDA10
CPA
BR2
BR1
CS BOOT
ADDR
DATA
EPROM
(OPTIONAL)
HOST
PROCESSOR
(OPTIONAL)
CS
ADDR
DATA
ADDR
DATA
CS SDRAM
(OPTIONAL)
RAS
CAS
DQM
WE
CLK
CKE
A10
Figure 3. Multiprocessing System
–6– REV. B

6 Page









ADSP-21065LKCA-264 pdf, datenblatt
ADSP-21065L–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Parameter
Test
Conditions
VDD
TCASE
Supply Voltage
Case Operating Temperature
VIH
High Level Input Voltage
@ VDD = max
VIL1
Low Level Input Voltage1
@ VDD = min
VIL2
Low Level Input Voltage2
@ VDD = min
NOTE
See Environmental Conditions for information on thermal specifications.
C Grade
Min Max
3.13 3.60
–40 +100
2.0 VDD + 0.5
–0.5 0.8
–0.5 0.7
K Grade
Min Max
3.13 3.60
0 +85
2.0 VDD + 0.5
–0.5 0.8
–0.5 0.7
Units
V
°C
V
V
V
ELECTRICAL CHARACTERISTICS
Parameter
Test Conditions
C & K Grades
Min Max
Units
VOH
VOL
IIH
IIL
IILP
IOZH
IOZL
IOZLS
IOZLA
IOZLAR
IOZLC
CIN
High Level Output Voltage3
Low Level Output Voltage3
High Level Input Current5
Low Level Input Current5
Low Level Input Current6
Three-State Leakage Current7, 8, 9, 10
Three-State Leakage Current7
Three-State Leakage Current8
Three-State Leakage Current11
Three-State Leakage Current10
Three-State Leakage Current9
Input Capacitance12, 13
@ VDD = min, IOH = –2.0 mA4
@ VDD = min, IOL = 4.0 mA4
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = VDD max
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 1.5 V
@ VDD = max, VIN = 0 V
@ VDD = max, VIN = 0 V
fIN = 1 MHz, TCASE = 25°C, VIN = 2.5 V
2.4
0.4
10
10
150
10
8
150
350
4
1.5
8
V
V
µA
µA
µA
µA
µA
µA
µA
mA
mA
pF
NOTES
1 Applies to input and bidirectional pins: DATA31-0, ADDR23-0, BSEL, RD, WR, SW, ACK, SBTS, IRQ2-0, FLAG11-0, HBG, CS, DMAR1, DMAR2, BR2-1, ID2-0,
RPBA, CPA, TFS0, TFS1, RFS0, RFS1, BMS, TMS, TDI, TCK, HBR, DR0A, DR1A, DR0B, DR1B, TCLK0, TCLK1, RCLK0, RCLK1, RESET, TRST,
PWM_EVENT0, PWM_EVENT1, RAS, CAS, SDWE, SDCKE.
2 Applies to input pin CLKIN.
3 Applies to output and bidirectional pins: DATA31-0, ADDR23-0, MS3-0, RD, WR, SW, ACK, FLAG11-0, HBG, REDY, DMAG1, DMAG2, BR2-1, CPA, TCLK0,
TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, DT0A, DT1A, DT0B, DT1B, XTAL, BMS, TDO, EMU, BMSTR, PWM_EVENT0, PWM_EVENT1,
RAS, CAS, DQM, SDWE, SDCLK0, SDCLK1, SDCKE, SDA10.
4 See Output Drive Currents for typical drive current capabilities.
5 Applies to input pins: ACK, SBTS, IRQ2-0, HBR, CS, DMAR1, DMAR2, ID1-0, BSEL, CLKIN, RESET, TCK (Note that ACK is pulled up internally with 2 k
during reset in a multiprocessor system, when ID1-0 = 01 and another ADSP-21065L is not requesting bus mastership.)
6Applies to input pins with internal pull-ups: DR0A, DR1A, DR0B, DR1B, TRST, TMS, TDI.
7Applies to three-statable pins: DATA31-0, ADDR23-0, MS3-0, RD, WR, SW, ACK, FLAG11-0, REDY, HBG, DMAG1, DMAG2, BMS, TDO, RAS, CAS, DQM,
SDWE, SDCLK0, SDCLK1, SDCKE, SDA10 and EMU (Note that ACK is pulled up internally with 2 kduring reset in a multiprocessor system, when ID1-0 =
01 and another ADSP-21065L is not requesting bus mastership).
8 Applies to three-statable pins with internal pull-ups: DT0A, DT1A, DT0B, DT1B, TCLK0, TCLK1, RCLK0, RCLK1.
9Applies to CPA pin.
10Applies to ACK pin when pulled up.
11Applies to ACK pin when keeper latch enabled.
12Guaranteed but not tested.
13Applies to all signal pins.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to VDD + 0.5 V
Output Voltage Swing . . . . . . . . . . . . . . –0.5 V to VDD + 0.5 V
Load Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 pF
Junction Temperature Under Bias . . . . . . . . . . . . . . . . . 130°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (5 seconds) . . . . . . . . . . . . . . . . . . +280°C
*Stresses greater than those listed above may cause permanent damage to the device.
These are stress ratings only; functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
ESD SENSITIVITY
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADSP-21065L features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–12–
REV. B

12 Page





SeitenGesamt 44 Seiten
PDF Download[ ADSP-21065LKCA-264 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
ADSP-21065LKCA-264DSP MicrocomputerAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche