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PDF ADS822 Data sheet ( Hoja de datos )
| Número de pieza | ADS822 | |
| Descripción | 10-Bit/ 40MHz Sampling ANALOG-TO-DIGITAL CONVERTERS | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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®
ADS825
ADS822
ADS822
ADS825
For most current data sheet and other product
information, visit www.burr-brown.com
TM 10-Bit, 40MHz Sampling
ANALOG-TO-DIGITAL CONVERTERS
FEATURES
q HIGH SNR: 60dB
q HIGH SFDR: 72dBFS
q LOW POWER: 190mW
q INTERNAL/EXTERNAL REFERENCE OPTION
q SINGLE-ENDED OR
FULLY DIFFERENTIAL ANALOG INPUT
q PROGRAMMABLE INPUT RANGE
q LOW DNL: 0.5LSB
q SINGLE +5V SUPPLY OPERATION
q +3V OR +5V LOGIC I/O COMPATIBLE (ADS825)
q POWER DOWN: 20mW
q 28-LEAD SSOP PACKAGE
APPLICATIONS
q MEDICAL IMAGING
q TEST EQUIPMENT
q COMPUTER SCANNERS
q COMMUNICATIONS
q VIDEO DIGITIZING
DESCRIPTION
The ADS822 and ADS825 are pipeline, CMOS analog-to-digital
converters that operate from a single +5V power supply. These
converters provide excellent performance with a single-ended
input and can be operated with a differential input for added
spurious performance. These high-performance converters in-
clude a 10-bit quantizer, high-bandwidth track-and-hold, and a
high-accuracy internal reference. They also allow for the user to
disable the internal reference and utilize external references. This
external reference option provides excellent gain and offset
matching when used in multi-channel applications or in applica-
tions where full-scale range adjustment is required.
The ADS822 and ADS825 employ digital error correction tech-
niques to provide excellent differential linearity for demanding
imaging applications. Its low distortion and high SNR give the
extra margin needed for medical imaging, communications,
video, and test instrumentation. The ADS822 and ADS825 offer
power dissipation of 190mW and also provide a power-down
mode, thus reducing power dissipation to only 20mW. The
ADS825 is +3V or +5V Logic I/O compatible.
The ADS822 and ADS825 are specified at a maximum sampling
frequency of 40MHz and a single-ended input range of 1.5V to
3.5V. The ADS822 and ADS825 are available in a 28-lead SSOP
package and are pin-for-pin compatible with the 10-bit, 60MHz
ADS823 and ADS826, and the 10-bit, 70MHz ADS824, provid-
ing an upgrade path to higher sampling frequencies.
+VS CLK VDRV
ADS822
ADS825
Timing
Circuitry
VIN IN
IN T/H
10-Bit
Pipelined
A/D Core
Error
Correction
Logic
3-State
Outputs
D0
•••
D9
CM Internal
Reference
Optional External
Reference
Int/Ext
PD OE
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1997 Burr-Brown Corporation
PDS-1385E
Printed in U.S.A. October, 1999
1 page  
TYPICAL PERFORMANCE CURVES
At TA = full specified temperature range, VS = +5V, single-ended input range = 1.5V to 3.5V, and sampling rate = 40MHz, external reference, unless otherwise noted.
0
–20
–40
–60
–80
–100
0
SPECTRAL PERFORMANCE
fIN = 1MHz
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
0
SPECTRAL PERFORMANCE
fIN = 10MHz
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
0
SPECTRAL PERFORMANCE
(Differential Input, 1Vp-p)
fIN = 10MHz
SNR = 58dBFS
SFDR = 74dBFS
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
0
SPECTRAL PERFORMANCE
(Single-Ended, 1Vp-p)
fIN = 10MHz
SNR = 57dBFS
SFDR = 71dBFS
5 10 15
Frequency (MHz)
20
SPECTRAL PERFORMANCE
(Single-Ended, 1Vp-p)
0
fIN = 20MHz
SNR = 57dBFS
–20 SFDR = 70dBFS
–40
–60
–80
–100
0
5 10 15
Frequency (MHz)
20
0
–20
–40
–60
–80
–100
0
UNDERSAMPLING
(Differential Input, 2Vp-p)
fS = 40MHz
fIN = 45MHz
SNR = 60dBFS
SFDR = 74dBFS
5 10 15
Frequency (MHz)
20
®
5 ADS822, ADS825
5 Page 
the resistive reference ladder. The bandgap reference circuit
includes logic functions that allows setting the analog input
swing of the ADS822 and ADS825 to either a 1Vp-p or
2Vp-p full-scale range simply by tying the RSEL pin to a
Low or High potential, respectively. While operating the
ADS822 in the external reference mode, the buffer amplifi-
ers for the REFT and REFB are disconnected from the
reference ladder.
As shown, the ADS822 and ADS825 have internal 50kΩ
pull-up resistors at the range select pin (RSEL) and refer-
ence select pin (INT/EXT). Leaving these pins open config-
ures the ADS822 and ADS825 for a 2Vp-p input range and
external reference operation. Setting the ADS822 and
ADS825 up for internal reference mode requires bringing
the INT/EXT pin Low.
The reference buffers can be utilized to supply up to 1mA
(sink and source) to external circuitry. The resistor ladders
of the ADS822 and ADS825 are divided into several seg-
ments and have two additional nodes, ByT and ByB, which
are brought out for external bypassing only (see Figure 6).
To ensure proper operation with any reference configura-
tions, it is necessary to provide solid bypassing at all refer-
ence pins in order to keep the clock feedthrough to a
minimum. All bypassing capacitors should be located as
close to their respective pins as possible.
REFT
+3.5V
R1
1.6kΩ
ADS822
ADS825
R2
1.6kΩ
REFB
+1.5V
0.1µF
CMV
+2.5V
0.1µF
FIGURE 7. Alternative Circuit to Generate CM Voltage.
The common-mode voltage available at the CM pin may be
used as a bias voltage to provide the appropriate offset for
the driving circuitry. However, care must be taken not to
appreciably load this node, which is not buffered and has a
high impedance. An alternative way of generating a com-
mon-mode voltage is given in Figure 7. Here, two external
precision resistors (tolerance 1% or better) are located
between the top and bottom reference pins. The common-
mode voltage, CMV, will appear at the midpoint.
EXTERNAL REFERENCE OPERATION
For even more design flexibility, the internal reference can
be disabled and an external reference voltage be used. The
utilization of an external reference may be considered for
applications requiring higher accuracy, improved tempera-
ture performance, or a wide adjustment range of the
converter’s full-scale range. Especially in multichannel
applications, the use of a common external reference has the
benefit of obtaining better matching of the full-scale range
between converters.
The external references can vary as long as the value of the
external top reference REFTEXT stays within the range of
(VS – 1.25V) and (REFB + 0.8V), and the external bottom
reference REFBEXT stays within 1.25V and (REFT – 0.8V)
(See Figure 8).
DIGITAL INPUTS AND OUTPUTS
Clock Input Requirements
Clock jitter is critical to the SNR performance of high-speed,
high-resolution A/D converters. Clock jitter leads to aperture
jitter (tA), which adds noise to the signal being converted. The
ADS822 and ADS825 samples the input signal on the rising
edge of the CLK input. Therefore, this edge should have the
lowest possible jitter. The jitter noise contribution to total
A - Short for 1Vp-p Input Range
B - Short for 2Vp-p Input Range (Default)
VIN
CMV
+2.5VDC
IN
IN
+5V
BA
+VS INT/EXT
RSEL
ADS822
ADS825
REFT
ByT
GND
ByB
GND
REFB
External Top Reference
REFT = REFB +0.8V to +3.75V
4 x 0.1µF || 2.2µF
FIGURE 8. Configuration Example for External Reference Operation.
11
External Bottom Reference
REFB = REFT –0.8V to +1.25V
ADS822, ADS825
®
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADS822.PDF ] | |
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