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Teilenummer | ADS809 |
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Beschreibung | 12-Bit/ 80MHz Sampling ANALOG-TO-DIGITAL CONVERTER | |
Hersteller | Burr-Brown Corporation | |
Logo | ||
Gesamt 20 Seiten ADS809
ADS809
SBAS170C – NOVEMBER 2000 – REVISED JANUARY 2003
12-Bit, 80MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q DYNAMIC RANGE:
SNR: 65dB at 10MHz fIN
SFDR: 68dB at 10MHz f
IN
q PREMIUM TRACK-AND-HOLD:
Low Jitter: 0.5ps rms
Differential or Single-Ended Inputs
Selectable Full-Scale Input Range
q FLEXIBLE CLOCKING:
Differential or Single-Ended
Accepts Sine or Square Wave Clocking
Down to 0.5Vp-p
Variable Threshold Level
APPLICATIONS
q BASESTATION WIDEBAND RADIOS:
CDMA, GSM, TDMA, 3G, AMPS, and NMT
q TEST INSTRUMENTATION
q CCD IMAGING
ADS809
+VS
DESCRIPTION
The ADS809 is a high-dynamic range, 12-bit, 80MHz, pipelined
Analog-to-Digital Converter (ADC). It includes a high-band-
width linear track-and-hold that has a low jitter of only 0.5ps
rms, leading to excellent Signal-to-Noise Ratio (SNR) perfor-
mance. The clock input can accept a low-level differential sine
wave or square wave signal down to 0.5Vp-p, further improv-
ing the SNR performance. It also accepts a single-ended
clock signal and has flexible threshold levels.
The ADS809 has a 2Vp-p differential input range (1Vp-p • 2
inputs) for optimum signal-to-noise ratio. The differential
operation gives the lowest even-order harmonic compo-
nents. A lower input voltage of 1.5Vp-p or 1Vp-p can also be
selected using the internal references, further optimizing
Spurious-Free Dynamic Range (SFDR). Alternatively, a single-
ended input range can be used by tying the IN input to the
common-mode voltage if desired.
The ADS809 also provides an over-range flag that indicates
when the input signal has exceeded the converter’s full-scale
range. This flag can also be used to reduce the gain of the
front-end signal conditioning circuitry. It also employs digital
error-correction techniques to provide excellent differential
linearity for demanding imaging applications. The ADS809 is
available in a small TQFP-48 PowerPAD™ thermally-
enhanced package.
PowerPAD is a registered trademark of Texas Instruments.
DV
Timing Circuitry
CLK
CLK
1Vp-p
1Vp-p
IN
IN
T&H
12-Bit
Pipelined
ADC Core
Error
Correction
Logic
3-State
Outputs
D0
•••
D11
CM
(+2.5V)
Reference Ladder
and Driver
Reference and
Mode Select
OVR
REFT
VREF SEL1 SEL2 REFB
OE VDRV
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 2000-2003, Texas Instruments Incorporated
TYPICAL CHARACTERISTICS
At TA = full specified temperature range, differential input range = 1V to 2V, sampling rate = 80MHz, and internal reference, unless otherwise noted.
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
(Differential, 2Vp-p)
fIN = 1MHz (–1.0dBFS)
SFDR = 70.1dBFS
SNR = 65.4dBFS
SINAD = 63.8dBFS
5 10 15 20 25 30 35 40
Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
(Differential, 2Vp-p)
fIN = 10MHz (–1.0dBFS)
SFDR = 68.3dBFS
SNR = 65.1dBFS
SINAD = 63.0dBFS
5 10 15 20 25 30 35 40
Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
(Differential, 1.5Vp-p)
fIN = 10MHz (–1.0dBFS)
SFDR = 68.9dBFS
SNR = 63.2dBFS
5 10 15 20 25 30 35 40
Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
0
2-TONE INTERMODULATION DISTORTION
f1 = 19.4MHZ
f2 = 20.4MHZ
IMD(3) = 77.2dBFS
5 10 15 20 25 30 35 40
Frequency (MHz)
0
–20
–40
–60
–80
–100
–120
0
SPECTRAL PERFORMANCE
(Differential, 1Vp-p)
fIN = 10MHz (–1.0dBFS)
SFDR = 69.6dBFS
SNR = 60.7dBFS
5 10 15 20 25 30 35 40
Frequency (MHz)
80
75
70
65
60
55
50
30
DYNAMIC PERFORMANCE
vs SAMPLING FREQUENCY
(2Vp-p, Differential)
fIN = 10MHz
SFDR
SNR
SINAD
40 50 60 70 80
Sampling Frequency (MHz)
90
6 ADS809
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SBAS170C
6 Page AC-Coupled, Differential Interface with Gain
The interface circuit example presented in Figure 6 employs
two OPA685s, (current-feedback op amps), optimized for
gains of 8V/V or higher. The input transformer (T1) converts
the single-ended input signal to a differential signal required
at the amplifier’s inverting inputs, that are tuned to provide
a 50Ω impedance match to an assumed 50Ω source. To
achieve the 50Ω input match at the primary of the 1:2
transformer, the secondary input must see a 200Ω load
impedance. Both amplifiers are configured for the inverting
mode resulting in close gain and phase matching of the
differential signal. This technique, along with a highly sym-
metrical layout, is instrumental in achieving a substantial
reduction of the 2nd-harmonic, while retaining excellent 3rd-
order performance. A common-mode voltage (VCM) is ap-
plied to the noninverting inputs of the OPA685. Additional
series of 43.2Ω resistors isolate the output of the op amps
from the capacitive load presented by the 22pF capacitors
and the input capacitance of the ADS809. This 43.2Ω/22pF
combination sets a pole at approximately 167MHz and rolls
off some of the wideband noise.
REFERENCE
REFERENCE OPERATION
Integrated into the ADS809 is a bandgap reference circuit
including some logic that provides a +0.5V, +0.75V, or +1V
reference output by selecting the corresponding pin-strap
configuration. Table I gives a complete overview of the
possible reference options and pin configurations.
VCM
50Ω Source
VI
Noise
Figure
11.8dB
T1
1:2
100Ω
100Ω
VCM
+5V
DIS
OPA685
–5V 600Ω
600Ω
+5V
DIS
OPA685
–5V
Power-supply decoupling
not shown.
43.2Ω
43.2Ω
22pF
VO ADC Input
22pF
VO = 12V/V (21.6dB)
VI
FIGURE 6. Wideband Differential ADC Driver.
DESIRED FULL-SCALE RANGE,
FSR (Differential)
CONNECT
SEL1 (Pin 33)
CONNECT
SEL2 (Pin 32)
VOLTAGE AT VREF
(Pin 34)
VOLTAGE AT REFT
(Pin 41)
2Vp-p (+10dBm)
1.5Vp-p (+7.5dBm)
1Vp-p
External Reference
GND
GND
VREF
—
GND
+VS
GND
—
+1.0V
+0.75V
+0.5V
> +3.5V
+3V
+2.875V
+2.75V
+2.75V to +4.5V
TABLE I. Reference Pin Configurations and Corresponding Voltage on the Reference Pins.
VOLTAGE AT REFB
(Pin 39)
+2V
+2.125V
+2.25V
+0.5V to +2.25V
12 ADS809
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SBAS170C
12 Page | ||
Seiten | Gesamt 20 Seiten | |
PDF Download | [ ADS809 Schematic.PDF ] |
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