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PDF ADS7819P Data sheet ( Hoja de datos )
| Número de pieza | ADS7819P | |
| Descripción | 12-Bit 800kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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®
FPOADS7819
ADS7819
ADS7819
12-Bit 800kHz Sampling CMOS
ANALOG-to-DIGITAL CONVERTER
FEATURES
q 1.25µs THROUGHPUT TIME
q STANDARD ±2.5V INPUT RANGE
q 70dB min SINAD WITH 250kHz INPUT
q ±3/4 LSB max INL AND ±1 LSB max DNL
q INTERNAL REFERENCE
q COMPLETE WITH S/H, REF, CLOCK, ETC.
q PARALLEL DATA w/ LATCHES
q 28-PIN 0.3" PDIP AND SOIC
DESCRIPTION
The ADS7819 is a complete 12-bit sampling A/D
using state-of-the-art CMOS structures. It contains a
complete 12-bit capacitor-based SAR A/D with inher-
ent S/H, reference, clock, interface for microprocessor
use, and three-state output drivers.
The ADS7819 is specified at an 800kHz sampling
rate, and guaranteed over the full temperature range.
Laser-trimmed scaling resistors provide a ±2.5V input
range and inherent overvoltage protection up to ±25V.
The 28-pin ADS7819 is available in a plastic 0.3" DIP
and in an SOIC, both fully specified for operation over
the industrial –40°C to +85°C range.
Clock
Successive Approximation Register and Control Logic
575Ω
±2.5V Input
2.5kΩ
Cap
CDAC
Comparator
Output
Latches
and
Three
State
Drivers
BUSY
Three
State
Parallel
Data
Bus
2.5V Ref Out/In
18kΩ
Buffer
4.8kΩ
8.6kΩ
Internal
Ref
International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1992 Burr-Brown Corporation
PDS-1193C
Printed in U.S.A. February, 1995
1 page  
TYPICAL PERFORMANCE CURVES
T = +25°C, fS =800kHz, +VDIG = +VANA = +5V, –VANA = –5V, using internal reference and the input 50Ω resistors as shown in Figure 4b, unless otherwise specified.
0
–20
–40
–60
–80
–100
–120
0
FREQUENCY SPECTRUM
(4096 Point FFT; fIN = 252kHz, –0.5dB)
100 200 300
Frequency (kHz)
400
0
–20
–40
–60
–80
–100
–120
0
FREQUENCY SPECTRUM
(4096 Point FFT; fIN = 502kHz, –0.5dB)
2
100 200 300
Frequency (kHz)
400
0
–20
–40
–60
–80
–100
–120
0
FREQUENCY SPECTRUM
(4096 Point FFT; fIN = 1.002MHz, –0.5dB)
100 200 300
Frequency (kHz)
400
0
–20
–40
–60
–80
–100
–120
0
FREQUENCY SPECTRUM
(4096 Point FFT; f1IN = 232kHz, –6.5dB;
f2IN = 272kHz, –6.5dB)
100 200 300
Frequency (kHz)
400
90
80
70
60
50
40
30
20
10
1k
SIGNAL-TO-(NOISE + DISTORTION)
vs INPUT FREQUENCY (fIN = –0.5dB)
10k 100k 1M
Input Signal Frequency (Hz)
10M
A.C. PARAMETERS vs TEMPERATURE
(fIN = 250kHz, –0.5dB)
100
95 SFDR
90
85
THD
80
75 SNR
70
SINAD
65
60
–75 –50 –25
0 25 50 75 100 125 150
Temperature (°C)
®
5 ADS7819
5 Page 
CAP
CAP (pin 4) is the output of the internal reference buffer. A
10µF tantalum capacitor should be placed as close to the
CAP as possible to provide optimum switching currents for
the CDAC throughout the conversion cycle and compensa-
tion for the output of the buffer. Using a capacitor any
smaller than 1µF can cause the output buffer to oscillate and
may not have sufficient charge for the CDAC. Capacitor
values larger than 10µF will have little effect on improving
performance. The voltage on the CAP pin is approximately
2V when using the internal reference, or 80% of an exter-
nally supplied reference.
LAYOUT
POWER
The ADS7819 uses the majority of its power for analog and
static circuitry, and it should be considered as an analog
component. For optimum performance, tie the analog and
digital +5V power pins to the same +5V power supply and
tie the analog and digital grounds together.
For best performance, the ±5V supplies can be produced
from whatever analog supply is used for the rest of the
analog signal conditioning. If ±12V or ±15V supplies are
present, simple regulators can be used. The +5V power for
the A/D should be separate from the +5V used for the
system’s digital logic. Connecting +VDIG (pin 27) directly to
a digital supply can reduce converter performance due to
switching noise from the digital logic.
Although it is not suggested, if the digital supply must be
used to power the converter, be sure to properly filter the
supply. Either using a filtered digital supply or a regulated
analog supply, both VDIG and VANA should be tied to the
same +5V source.
other CMOS A/D converters, releases 5%—10% of the
charge. There is also a resistive front end which attenuates
any charge which is released. The end result is a minimal
requirement for the op amp on the front end. Any op amp
sufficient for the signal in an application will be sufficient to
the drive the ADS7819.
The resistive front end of the ADS7819 also provides a
guaranteed ±25V over voltage protection. In most cases, this
eliminates the need for external input protection circuitry.
INTERMEDIATE LATCHES
2The ADS7819 does have tri-state outputs for the parallel
port, but intermediate latches should be used if the bus will
be active during conversions. If the bus is not active during
conversions, the tri-state outputs can be used to isolate the
A/D from other peripherals on the same bus.
Intermediate latches are beneficial on any monolithic A/D
converter. The ADS7819 has an internal LSB size of 610µV.
Transients from fast switching signals on the parallel port,
even when the A/D is tri-stated, can be coupled through the
substrate to the analog circuitry causing degradation of
converter performance.
GROUNDING
Three ground pins are present on the ADS7819. DGND (pin 22)
is the digital supply ground. AGND2 (pin 5) is the analog
supply ground. AGND1 (pin 2) is the ground which all analog
signals internal to the A/D are referenced. AGND1 is more
susceptible to current induced voltage drops and must have the
path of least resistance back to the power supply.
All the ground pins of the ADS should be tied to the
analog ground plane, separated from the system’s digital
logic ground, to achieve optimum performance. Both ana-
log and digital ground planes should be tied to the “sys-
tem” ground as near to the power supplies as possible.
This helps to prevent dynamic digital ground currents
from modulating the analog ground through a common
impedance to power ground.
SIGNAL CONDITIONING
The FET switches used for the sample hold on many CMOS
A/D converters release a significant amount of charge injec-
tion which can cause the driving op amp to oscillate. The
FET switch on the ADS7819, compared to FET switches on
11
ADS7819
®
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ADS7819P.PDF ] | |
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