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PDF ADS7815 Data sheet ( Hoja de datos )

Número de pieza ADS7815
Descripción 16-Bit 250kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER
Fabricantes Burr-Brown Corporation 
Logotipo Burr-Brown Corporation Logotipo



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®
ADS7815
ADS7815
16-Bit 250kHz Sampling CMOS
ANALOG-to-DIGITAL CONVERTER
FEATURES
q 250kHz SAMPLING RATE
q COMPLETE WITH S/H, REF, CLOCK, ETC.
q 96dB min SFDR WITH 100kHz INPUT
q 84dB min SINAD
q ±2.5V INPUT RANGE
q 28-LEAD SOIC
APPLICATIONS
q WIRELESS BASE STATIONS
q SPECTRUM ANALYSIS
q IMAGING SYSTEMS
q DATA ACQUISITION
DESCRIPTION
The ADS7815 is a complete 16-bit sampling analog-
to-digital (A/D) converter featuring excellent AC
performance and a 250kHz throughput rate. The de-
sign includes a 16-bit capacitor-based SAR A/D
converter with an inherent sample and hold (S/H), a
precision reference, and an internal clock. Spurious-
free dynamic range with a 100kHz full-scale sinewave
input is typically greater than 100dB. The ±2.5V input
range allows development of precision systems using
only ±5V supplies. The converter is available in a
28-lead SOIC package specified for operation over
the industrial –25°C to +85°C temperature range.
±2.5V Input
REF Out/In
Clock
Successive Approximation Register and Control Logic
CDAC
Buffer
5k
Internal
+2.5V Ref
Comparator
Output
Latches
and
Three
State
Drivers
R/C
CS
BUSY
Parallel
Data
Bus
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1996 Burr-Brown Corporation
PDS-1364A
Printed in U.S.A. December, 1996

1 page




ADS7815 pdf
BASIC OPERATION
Figure 1 shows the recommended circuit for operation of the
ADS7815. A falling edge on the convert pulse signal places
the sample and hold into the hold mode and initiates a
conversion. When the conversion is complete, the pins D15
through D0 become active and the result of the conversion
is placed on these outputs. In the circuit shown in Figure 1,
the rising edge of BUSY latches the result into the 74HC574s.
After the conversion is complete, the ADS7815 sample and
hold returns to the sample mode and begins acquiring the
input signal for the next conversion. Allowing 4µs between
falling edges of the convert pulse signal assures accurate
acquisition of the analog input.
R1
75
+5V
OPA628
R2
10
–5V +
2.2µF
0.1µF
C3 C5
2.2µF
C4
+
0.1µF
C6
1 VIN
2 GND
3 REF
+VS 28
+VS 27
BUSY 26
4 CAP
CS 25
5 GND
R/C 24
6 D15
–VS 23
7 D14
D0 22
ADS7815
8 D13
D1 21
9 D12
D2 20
10 D11
D3 19
11 D10
D4 18
12 D9
D5 17
13 D8
D6 16
14 GND
D7 15
FIGURE 1. Basic Operation.
5
0.1µF
C1
0.1µF
C7
+ 10µF
C2
+5V
Convert Pulse
74HC00 –5V
10µF
+ C8
1
OC
10
CLK
2 1D
3 2D
4 3D
5 4D
6 5D
7 6D
8 7D
9 8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
74HC574
100ns min
OC
µProcessor
Bus
1
OC
10
CLK
2 1D
3 2D
4 3D
5 4D
6 5D
7 6D
8 7D
9 8D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
74HC574
µProcessor
Bus
ADS7815
®

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