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ADS774JU Schematic ( PDF Datasheet ) - Burr-Brown Corporation

Teilenummer ADS774JU
Beschreibung Microprocessor-Compatible Sampling CMOS ANALOG-to-DIGITAL CONVERTER
Hersteller Burr-Brown Corporation
Logo Burr-Brown Corporation Logo 




Gesamt 13 Seiten
ADS774JU Datasheet, Funktion
® ADS774
ADS774
ADS774
ADS774
Microprocessor-Compatible Sampling
CMOS ANALOG-to-DIGITAL CONVERTER
FEATURES
q REPLACES ADC574, ADC674 AND ADC774
FOR NEW DESIGNS
q COMPLETE SAMPLING A/D WITH
REFERENCE, CLOCK AND
MICROPROCESSOR INTERFACE
q FAST ACQUISITION AND CONVERSION:
8.5µs max OVER TEMPERATURE
q ELIMINATES EXTERNAL SAMPLE/HOLD
IN MOST APPLICATIONS
q GUARANTEED AC AND DC PERFOR-
MANCE
q SINGLE +5V SUPPLY OPERATION
q LOW POWER: 120mW max
q PACKAGE OPTIONS: 0.6" and 0.3" DIPs,
SOIC
DESCRIPTION
The ADS774 is a 12-bit successive approximation
analog-to-digital converter using an innovative
capacitor array (CDAC) implemented in low-power
CMOS technology. This is a drop-in replacement for
ADC574, ADC674, and ADC774 models in most
applications, with internal sampling, much lower power
consumption, and the ability to operate from a single
+5V supply.
The ADS774 is complete with internal clock, micro-
processor interface, three-state outputs, and internal
scaling resistors for input ranges of 0V to +10V, 0V to
+20V, ±5V, or ±10V. The maximum throughput time
is 8.5µs over the full operating temperature range,
including both acquisition and conversion.
Complete user control over the internal sampling func-
tion facilitates elimination of external sample/hold
amplifiers in most existing designs.
The ADS774 requires +5V, with –15V optional. No
+15V supply is required. Available packages include
0.3" or 0.6" wide 28-pin plastic DIP and 28-pin SOICs.
Control
Inputs
Bipolar Offset
20V Range
10V Range
2.5V Reference
Input
2.5V Reference
Output
CDAC
Control Logic
Clock
+
Comparator
Successive
Approximation
Register
2.5V
Reference
Status
Parallel
Data
Output
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1991 Burr-Brown Corporation
PDS-1109F
Printed in U.S.A. July, 1995






ADS774JU Datasheet, Funktion
THEORY OF OPERATION
In the ADS774, the advantages of advanced CMOS technol-
ogy—high logic density, stable capacitors, precision analog
switches—and Burr-Brown’s state of the art laser trimming
techniques are combined to produce a fast, low power
analog-to-digital converter with internal sample/hold.
The charge-redistribution successive-approximation circuitry
converts analog input voltages into digital words.
A simple example of a charge-redistribution A/D converter
with only 3 bits is shown in Figure 1.
Analog
Input
Signal
SC Comparator
4C
S
S1
2C
S2
C
S3
RG RG RG
L
o
g
i
c
Out
Reference
Input
+
FIGURE 1. 3-Bit Charge Redistribution A/D.
INPUT SCALING
Precision laser-trimmed scaling resistors at the input divide
standard input ranges (0V to +10V, 0V to +20V, ±5V or
±10V) into levels compatible with the CMOS characteristics
of the internal capacitor array.
SAMPLING
While sampling, the capacitor array switch for the MSB
capacitor (S1) is in position “S”, so that the charge on the
MSB capacitor is proportional to the voltage level of the
analog input signal. The remaining array switches (S2 and
S3) are set to position “G”. Switch SC is closed, setting the
comparator input offset to zero.
CONVERSION
When a conversion command is received, switch S1 is
opened to trap a charge on the MSB capacitor proportional
to the analog input level at the time of the sampling com-
mand, and switch SC is opened to float the comparator input.
The charge trapped in the capacitor array can now be moved
between the three capacitors in the array by connecting
switches S1, S2, and S3 to positions “R” (to connect to the
reference) or “G” (to connect to GND), thus changing the
voltage generated at the comparator input.
During the first approximation, the MSB capacitor is con-
nected through switch S1 to the reference, while switches S2
and S3 are connected to GND. Depending on whether the
comparator output is HIGH or LOW, the logic will then
latch S1 in position “R” or “G”. Similarly, the second
approximation is made by connecting S2 to the reference and
S3 to GND, and latching S2 according to the output of the
comparator. After three successive approximation steps have
been made the voltage level at the comparator will be within
1/2LSB of GND, and a digital word which represents the
analog input can be determined from the positions of S1, S2
and S3.
OPERATION
BASIC OPERATION
Figure 2 shows the minimum connections required to oper-
ate the ADS774 in a basic ±10V range in the Control Mode
(discussed in detail in a later section.) The falling edge of a
Convert Command (a pulse taking pin 5 LOW for a mini-
mum of 25ns) both switches the ADS774 input to the hold
state and initiates the conversion. Pin 28 (STATUS) will
output a HIGH during the conversion, and falls only after the
conversion is completed and the data has been latched on the
data output pins (pins 16 to 27.) Thus, the falling edge of
STATUS on pin 28 can be used to read the data from the
conversion. Also, during conversion, the STATUS signal
puts the data output pins in a High-Z state and inhibits the
input lines. This means that pulses on pin 5 are ignored, so
that new conversions cannot be initiated during the conver-
sion, either as a result of spurious signals or to short-cycle
the ADS774.
The ADS774 will begin acquiring a new sample as soon as
the conversion is completed, even before the STATUS
output falls, and will track the input signal until the next
conversion is started. The ADS774 is designed to complete
a conversion and accurately acquire a new signal in 8.5µs
max over the full operating temperature range, so that
conversions can take place at a full 117kHz.
CONTROLLING THE ADS774
The Burr-Brown ADS774 can be easily interfaced to most
microprocessor systems and other digital systems. The
microprocessor may take full control of each conversion, or
the converter may operate in a stand-alone mode, controlled
only by the R/C input. Full control consists of selecting an
8- or 12-bit conversion cycle, initiating the conversion, and
reading the output data when ready—choosing either 12 bits
all at once, or the 8 MSB bits followed by the 4 LSB bits in
a left-justified format. The five control inputs (12/8, CS, A0,
R/C, and CE) are all TTL/CMOS-compatible. The functions
of the control inputs are described in Table II. The control
function truth table is shown in Table III.
STAND-ALONE OPERATION
For stand-alone operation, control of the converter is accom-
plished by a single control line connected to R/C. In this
mode CS and A0 are connected to digital common and CE
and 12/8 are connected to +5V. The output data are
®
ADS774
6

6 Page









ADS774JU pdf, datenblatt
+VCC
R1
100k
Unipolar
Offset
Adjust
Full-Scale
Adjust
R2
100k
–VCC
100
2.5V
10
8
Ref In
Ref Out
ADS774
100
R3
Analog
Input
10V
Range
12 Bipolar Offset
13
Analog
Common
20V
Range
14
9
FIGURE 10. Unipolar Configuration.
Full-Scale Adjust
R2
100
10
2.5V 8
Ref In
Ref Out
ADS774
Bipolar
Offset
Adjust
100
R1
12 Bipolar Offset
Analog
Input
10V
Range
20V
Range
Analog
Common
13
14
9
FIGURE 11. Bipolar Configuration.
connected either to Pin 9 (Analog Common) for unipolar
operation, or to Pin 8 (2.5V Ref Out), or the external
reference, for bipolar operation. Full-scale and offset adjust-
ments are described below.
The input impedance of the ADS774 is typically 50kin the
20V ranges and 12kin the 10V ranges. This is signifi-
cantly higher than that of traditional ADC774 architectures,
reducing the load on the input source in most applications.
INPUT STRUCTURE
Figure 12 shows the resistor divider input structure of the
ADS774. Since the input is driving a capacitor in the CDAC
during acquisition, the input is looking into a high imped-
ance node as compared with traditional ADC774 architec-
tures, where the resistor divider network looks into a com-
parator input node at virtual ground.
To understand how this circuit works, it is necessary to
know that the input range on the internal sampling capacitor
is from 0V to +3.33V, and the analog input to the ADS774
must be converted to this range. Unipolar 20V range can be
used as an example of how the divider network functions. In
20V operation, the analog input goes into pin 14. Pin 13 is
left unconnected and pin 12 is connected to pin 9, analog
common. From Figure 12, it is clear that the input to the
capacitor array will be the analog input voltage on pin 14
divided by the resistor network (42k+ 42k|| 10.5k). A
20V input at pin 14 is divided to 3.33V at the capacitor
array, while a 0V input at pin 14 gives 0V at the capacitor
array.
The main effect of the 10kinternal resistor on pin 12 is to
provide the same offset adjust response as that of traditional
ADC774 architectures without changing the external trimpot
values.
SINGLE SUPPLY OPERATION
The ADS774 is designed to operate from a single +5V
supply, and handle all of the unipolar and bipolar input
ranges, in either the Control Mode or the Emulation Mode as
described above. Pin 7 is not connected internally. This is
The +5V supply should be bypassed with a 10µF tantalum
capacitor located close to the converter to promote noise-
free operations, as shown in Figure 2. Noise on the power
supply lines can degrade the converter’s performance. Noise
and spikes from a switching power supply are especially
troublesome.
RANGE CONNECTIONS
The ADS774 offers four standard input ranges: 0V to +10V,
0V to +20V, ±5V, or ±10V. Figures 10 and 11 show the
necessary connections for each of these ranges, along with
the optional gain and offset trim circuits. If a 10V input
range is required, the analog input signal should be con-
nected to pin 13 of the converter. A signal requiring a 20V
range is connected to pin 14. In either case the other pin of
the two is left unconnected. Pin 12 (Bipolar Offset) is
Pin 14
20V Range
42k
Pin 13
10V Range
21k
21k
Capacitor
Array*
Bipolar
Offset
Pin 12
10.5k
10k
*10pF when sampling
FIGURE 12. ADS774 Input Structure.
®
ADS774
12

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