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PDF AFE1224E Data sheet ( Hoja de datos )

Número de pieza AFE1224E
Descripción 2Mbps/ Single Pair ANALOG FRONT END
Fabricantes Burr-Brown Corporation 
Logotipo Burr-Brown Corporation Logotipo



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No Preview Available ! AFE1224E Hoja de datos, Descripción, Manual

® AFE1224
AFE1224
For most current data sheet and other product
information, visit www.burr-brown.com
2Mbps, Single Pair ANALOG FRONT END
FEATURES
q E1/T1 SINGLE PAIR 2B1Q
q PROGRAMMABLE POWER DISSIPATION
q 28-LEAD SSOP
q 64kbps TO 2320kbps OPERATION
q SCALEABLE DATA RATE
q PIN COMPATIBLE WITH AFE1124
q COMPLETE ANALOG INTERFACE
q –40°C TO +85°C OPERATION
DESCRIPTION
Burr-Brown’s Analog Front End minimizes the size
and cost of a single pair High bit rate Digital Sub-
scriber Line (HDSL) system by providing all of the
active analog circuitry needed to connect an HDSL
digital signal processor to an external compromise
hybrid and an HDSL line transformer. The transmit
and receive filter responses automatically change with
clock frequency, allowing the AFE1224 to operate
over a wide range of data rates. The power dissipation
of the device can be reduced under digital control for
operation at lower speeds. The AFE1224 will operate
at bit rates from 64kbps to 2.320Mbps.
Functionally, this unit consists of a transmit and a
receive section. The transmit section generates analog
signals from 2-bit digital symbol data and filters the
analog signals to create 2B1Q symbols. The on-board
differential line driver provides a 13.5dBm signal to
the telephone line. The receive section filters and
digitizes the symbol data received on the telephone
line. The AFE1224 operates on a single 5V supply.
The digital circuitry in the unit can be connected to a
supply from 3.3V to 5V. The chip uses only 355mW
for full-speed operation. It is housed in a 28-lead
SSOP package.
Pulse Former
tx and rx
Interface
Lines
tx and rx
Control
Registers
Decimation
Filter
∆Σ
Modulator
AFE1224
Line Driver
txLINE
txLINE
PGA
Difference
Amplifier
rxHYB
rxHYB
rxLINE
rxLINE
Patents Pending
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1999 Burr-Brown Corporation
PDS-1548A
Printed in U.S.A. June, 1999

1 page




AFE1224E pdf
TYPICAL PERFORMANCE CURVES
At Output of HDSL Pulse Transformer
The curves shown below are measured at the line output of the HDSL transformer. Typical at 25°C, AVDD+ = +5V, DVDD+ = +3.3V, and fTX = 1168kHz, unless otherwise specified.
AVERAGE POWER SPECTRAL DENSITY LIMIT
–20
T1
–40
–60
E1-SP
–80
E1
–80dB/decade
T1
E1
E1-SP
–100
–120
–140
1k
10k 100k
1M
10M
100M
Frequency (Hz)
CURVE 1. Upper Bound of Power Spectral Density Measured at Output of HDSL Transformer.
0.4T 0.4T
1.25T
–1.2T
–0.6T 0.5T
CURVE 2. Transmitted Pulse Template Measured at HDSL Transformer Output.
14T
50T
INPUT IMPEDANCE vs BIT RATE
100
Two Pair T1 = 784kbps, 32k
Two Pair E1 = 1168kbps, 21k
75 Single Pair E1 = 2320kbps, 10k
50
25
0
200
T1
E1
E1,
Single Pair
600 1000 1400 1800 2200 2600
Bit Rate (kbps)
CURVE 3. Input Impedance of rxLINE and rxHYB.
5
AFE1224
®

5 Page





AFE1224E arduino
Transmit
Data
Uncancelled
Echo
txDATP
txLINEP
txLINEN
rxHYBP
AFE1224
rxHYBN
rxLINEP
rxLINEN
100pF
576
1.59k
0.01µF 150
375
576
100pF
375
rxD13 - rxD0
131:2 5.6
13
5.6
135
S1
FIGURE 7. Uncancelled Echo Test Diagram.
®
11 AFE1224

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