Datenblatt-pdf.com


ADV7300A Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADV7300A
Beschreibung Multiformat SD/ Progressive Scan/HDTV Video Encoder with Six NSV 12-Bit DACs
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
ADV7300A Datasheet, Funktion
a
Multiformat SD, Progressive Scan/HDTV
Video Encoder with Six NSV12-Bit DACs
ADV7300A/ADV7301A
FEATURES
High Definition Input Formats
YCrCb Compliant to SMPTE293M (525 p),
ITU-R.BT1358 (625 p), SMPTE274M (1080 i),
SMPTE296M (720 p), and Any Other High Definition
Standard Using Async Timing Mode
RGB in 3 ؋ 10-Bit 4:4:4 Format
BTA T-1004 EDTV2 525 p Parallel
High Definition Output Formats (525 p/625 p/720 p/1080 i)
YPrPb Progressive Scan (EIA-770.1, EIA-770.2)
YPrPb HDTV (EIA 770.3)
RGB + H/V (HDTV 5-Wire Format)
CGMS-A (720 p/1080 i)
Macrovision Rev 1.0 (525 p/625 p)*
CGMS-A (525 p)
Standard Definition Input Formats
CCIR-656 4:2:2 8-/10-Bit Parallel Input
CCIR-601 4:2:2 16-/20-Bit Parallel Input
Standard Definition Output Formats
Composite NTSC M, N;
PAL M, N, B, D, G, H, I, PAL-60
SMPTE170M NTSC Compatible Composite Video
ITU-R.BT470 PAL Compatible Composite Video
S-Video (Y/C)
EuroScart RGB
Component YUV (Betacam, MII, SMPTE/EBU N10)
Macrovision Rev 7.1*
CGMS/WSS
Closed Captioning
GENERAL FEATURES
Simultaneous SD and HD Inputs and Outputs
Oversampling (108 MHz/148.5 MHz)
On-Board Voltage Reference
6 NSV Precision Video 12-Bit DACs
2-Wire Serial MPU Interface
Dual I/O Supply 2.5 V/3.3 V Operation
Analog and Digital Supply 2.5 V
On-Board PLL
64-LQFP Package
Lead-Free Product
APPLICATIONS
High End DVD Players
SD/Program Scan/HDTV Display Devices
SD/Program Scan/HDTV Set-Top Boxes
SD/HDTV Studio Equipment
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
S9–S0
Y9–Y0
C9–C0
S_HSYNC
S_VSYNC
S_BLANK
P_HSYNC
P_VSYNC
P_BLANK
CLKIN_A
CLKIN_B
STANDARD DEFINITION
CONTROL BLOCK
COLOR CONTROL
D BRIGHTNESS
E DNR
M GAMMA
U PROGRAMMABLE FILTERS
X SD TEST PATTERN
PROGRAMMABLE
RGB MATRIX
D
E
M
U
X
TIMING
GENERATOR
HIGH DEFINITION
CONTROL BLOCK
HD TEST PATTERN
COLOR CONTROL
ADAPTIVE FILTER CTRL
SHARPNESS FILTER
PLL
ADV7300A/
ADV7301A
12-BIT
DAC
O 12-BIT
V DAC
E
R
S
A
12-BIT
DAC
M
P 12-BIT
L DAC
I
N 12-BIT
G DAC
12-BIT
DAC
I2C
INTERFACE
GENERAL DESCRIPTION
The ADV7300A/ADV7301A is a high speed, digital-to-analog
encoder on a single monolithic chip. It includes six high speed
video D/A converters with TTL compatible inputs.
The ADV7300A/ADV7301A has three separate 10-bit wide input
ports that accept data in high definition and/or standard defini-
tion video format. For all standards, external horizontal, vertical,
and blanking signals, or EAV/SAV timing codes, control the
insertion of appropriate synchronization signals into the digital
data stream and therefore the output signals.
NSV (Noise Shaped Video) is a trademark of Analog Devices, Inc.
*ADV7300A Only
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002






ADV7300A Datasheet, Funktion
ADV7300A/ADV7301A
CLKIN_A
CONTROL
I/PS
P_HSYNC,
P_VSYNC,
P_BLANK
t9 t10
t12
Y9–Y0 Y0 Y1 Y2 Y3 Y4 Y5
C9–C0
CONTROL
O/PS
S_HSYNC,
S_VSYNC
Cb0 Cr0 Cb2 Cr2 Cb4 Cr4
t11 t13
t14
t9 = CLOCK HIGH TIME, t10 = CLOCK LOW TIME, t11 = DATA SETUP TIME, t12 = DATA HOLD TIME
Figure 2. HD 4:2:2 Input Data Format Timing Diagram, Input Mode: PS Input Only, HDTV
Input Only (Input Mode at Subaddress 01h = 001 or 010)
CLKIN_A
CONTROL
I/PS
P_HSYNC,
P_VSYNC,
P_BLANK
Y9–Y0
C9–C0
t9 t10
Y0 Y1 Y2
Cb0 Cb1 Cb2 Cb3
Yxxx
Yxxx
Cbxxx
Cbxxx
S9–S0
Cr0 Cr1 Cr2 Cr3
t12
t11
Crxxx
Crxxx
t13
CONTROL
O/PS
S_HSYNC,
S_VSYNC
t14
t9 = CLOCK HIGH TIME, t10 = CLOCK LOW TIME, t11 = DATA SETUP TIME, t12 = DATA HOLD TIME
Figure 3. HD 4:4:4 YCrCb Input Data Format Timing Diagram, Input Mode: PS Input Only,
HDTV Input Only (Input Mode at Subaddress 01h = 001 or 010)
–6– REV. A

6 Page









ADV7300A pdf, datenblatt
ADV7300A/ADV7301A
ABSOLUTE MAXIMUM RATINGS*
VAA to AGND . . . . . . . . . . . . . . . . . . . . . . . . +3.0 V to –0.3 V
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . +3.0 V to –0.3 V
VDD_IO to IO_GND . . . . . . . . . . . . . –0.3 V to VDD_IO + 0.3 V
Ambient Operating Temperature (TA) . . . . . . . 0°C to +70°C
Storage Temperature (TS) . . . . . . . . . . . . . . –65°C to +150°C
Infrared Reflow Soldering (20 sec) . . . . . . . . . . . . . . . . 260°C
*Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional opera-
tion of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS
θJC = 11ºC/W
θJA = 47ºC/W
The ADV7300A/ADV7301A is a lead-free environmentally
friendly product. It is manufactured using the most up to date
materials and processes. The coating on the leads of each device
is 100% pure tin electroplate. The device is suitable for lead-free
applications and is able to withstand surface-mount soldering up
to 255°C (± 5°C). In addition, it is backward compatible with
conventional tin-lead soldering processes. This means that the
electroplated tin coating can be soldered with tin-lead solder
pastes at conventional reflow temperatures of 220°C to 235°C.
ORDERING GUIDE
Model
Package Description Package Option
ADV7300AKST Plastic Quad Flatpack ST-64B
ADV7301AKST Plastic Quad Flatpack ST-64B
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADV7300A/ADV7301A features proprietary ESD protection circuitry, permanent damage may occur
on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
VDD_IO 1
Y0 2
Y1 3
Y2 4
Y3 5
Y4 6
Y5 7
Y6 8
Y7 9
VDD 10
DGND 11
Y8 12
Y9 13
C0 14
C1 15
C2 16
PIN 1
IDENTIFIER
ADV7300A/ADV7301A
TOP VIEW
(Not to Scale)
48 S_BLANK
47 RSET1
46 VREF
45 COMP1
44 DAC A
43 DAC B
42 DAC C
41 VAA
40 AGND
39 DAC D
38 DAC E
37 DAC F
36 COMP2
35 RSET2
34 EXT_LF
33 RESET
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Pin No.
1
2–9, 12, 13
10, 56
11, 57
Mnemonic
VDD_IO
Y0–Y9
VDD
DGND
PIN FUNCTION DESCRIPTIONS
Input/Output Function
P Power Supply for Digital Inputs and Outputs
I 10-Bit Progressive Scan/HDTV Input Port for Y Data. The LSBs are set up on
Pins Y0 and Y1. In Default Mode, the input on this port is output on DAC D.
P Digital Power Supply
G Digital Ground
–12–
REV. A

12 Page





SeitenGesamt 30 Seiten
PDF Download[ ADV7300A Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
ADV7300AMultiformat SD/ Progressive Scan/HDTV Video Encoder with Six NSV 12-Bit DACsAnalog Devices
Analog Devices

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche