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PDF EM78869 Data sheet ( Hoja de datos )
| Número de pieza | EM78869 | |
| Descripción | 8-Bit RISC Type Microprocessor | |
| Fabricantes | ELAN Microelectronics | |
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EM78869
8-Bit RISC Type
Microprocessor
Product
Specification
VERSION 1.0
ELAN MICROELECTRONICS CORP.
July 2004
1 page  
EM78869
8-Bit RISC Type Microprocessor
1 General Description
The EM78869 is an 8-bit RISC type microprocessor with low power, high speed CMOS
technology. Integrated into the single chip are on chip watchdog (WDT), RAM, ROM,
programmable real-time clock/counter, internal interrupt, power-down mode, LCD driver, and
tri-state I/O. The EM78869 provides a single chip solution for designing DATA-BANK of
message display.
The EM78869 is the cost-down version of its predecessor, the EM78862/B. Comparison
between the two series is as follows:
Item
EM78862
EM78862B
EM78869
ROM size
16K X 13 bit
16K X 13 bit
8K X 13 bit
RAM size
2.2K X 8 bit
2.2K X 8 bit
0.7K X 8 bit
LCD
60 X 9
60 X 9
40 X 9
LCD RAM
Write only when LCD is enabled. Read/Write when disabled.
Oscillator
Crystal
Crystal/RC
Crystal/RC
Code option MCLK
MCLK/OSCSEL
MCLK/ELCD/OSCSEL
Pins number 84 84 64
OTP
EM78P862A
EM78P862A
EM78P862A
2 Features
2.1 CPU
Operating voltage range: 2.2V ~ 5.5V
Operating temperature range: –20°C ~ +70°C.
32.768KHz Crystal/RC oscillation circuit selected by code option for system clock
144 byte general purpose register
640 x 8 bits on-chip data RAM
8K x 13 on-chip mask type program ROM.
Up to 29 bi-directional tri-state I/O ports
8-level stack for subroutine nesting
8-bit real time clock/counter (TCC)
Programmable free running on-chip watchdog timer
Port key scan function
Operation mode: a) Normal mode; b) Green mode; c).Idle mode; d) Sleep mode
Input port wake-up function (Port 9)
7 interrupt sources:
• 4 external (INT0 ~ INT3)
• 3 internal (one TCC timer overflow interrupt + two 8-bit counters overflow interrupt)
64-pin chip form (EM78869)
This specification is subject to change without further notice.
07.12.2004 (V1.0) 1 of 34
5 Page 
EM78869
8-Bit RISC Type Microprocessor
Bit 5:
Bit 6:
Bit 7:
Unused, fixed at “0”
(PAGE) Change IOCB ~ IOCE to another page, 0/1 => page0 / page1
Unused
6.1.5 R4 (Register Bank Select Register)
Bit 7
RBK1
Bit 6
RBK0
Bit 5
FSR5
Bit 4
FSR4
Bit 3
FSR3
Bit 2
FSR2
Bit 1
FSR1
Bit 0
FSR0
Bits 0 ~ 5: Used to select up to 32 registers in indirect address mode of each bank
Bits 6 ~ 7: Determine which bank is activated among the 4 banks
Refer to Fig. 4; Data Memory Configuration (previous page) for configuration of the data
memory
6.1.6 R5 (Program Page Select Register)
Bit 7
R57
Bit 0 ~2:
Bit 6
R56
Bit 5
R55
Bit 4
R54
Bit 3
0
Bit 2
PS2
(PS0 ~ PS2) Page select bits as shown below:
Bit 1
PS1
Bit 0
PS0
Bit 3:
Bit 4 ~7:
PS2 PS1 PS0 Program Memory Page (Address)
000
Page 0
001
Page 1
010
Page 2
::
110
Page 6
111
Page 7
You can use PAGE instruction to change and maintain program page. Otherwise,
use far jump (FJMP) or far call (FCALL) MACRO instructions to program user's
code. ÉLAN’s complier supports program page maintenance and can change
your program by inserting instructions within its program.
Unused. Set to ‘0’
4-bit I/O registers of Port 5
6.1.7 R6 (Port 6)
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 0: Port 6 single bit (Bit 0) I/O register
Bit 1 ~7: Unused
Bit 2
-
Bit 1
-
Bit 0
R60
6.1.8 R7 (Port 7)
Bit 7
R77
Bit 6
R76
Bit 5
R75
Bit 4
R74
Bit 0 ~7: Port 7 8-bit I/O registers
Bit 3
R73
Bit 2
R72
Bit 1
R71
Bit 0
R70
This specification is subject to change without further notice.
07.12.2004 (V1.0) 7 of 34
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM78869.PDF ] | |
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