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PDF EM78806B Data sheet ( Hoja de datos )
| Número de pieza | EM78806B | |
| Descripción | 8-BIT MICROCONTROLLER | |
| Fabricantes | ELAN Microelectronics | |
| Logotipo |  |
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EM78806B
8-BIT MICRO-CONTROLLER
Version 5.0
ELAN MICROELECTRONICS CORP.
No. 12, Innovation 1st RD., Science-Based Industrial Park
Hsin Chu City, Taiwan, R.O.C.
TEL: (03) 5639977
FAX: (03) 5630118
1 page  
EM78806B
8-bit Micro-controller
LCD
LCD operation voltage chosen by software
Common driver pins : 8
Segment driver pins : 24
1/4 bias
1/8 duty
PACKAGE
63-pin die (EM78806BH), 64-pin QFP (EM78806BAQ), 80-pin QFP (EM78806BBQ)
III.Application
Caller ID adjunct box or phone units for FSK/DTMF CID dual system development.
_________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
2 2004/08/10 V5.0
5 Page 
EM78806B
8-bit Micro-controller
"RET'' ("RETL k", "RETI") instruction loads the program counter with the contents at the top of stack.
"MOV R2,A" allows the loading of an address from the A register to the PC, and the ninth and tenth bits are
cleared to "0''.
"ADD R2,A" allows a relative address be added to the current PC, and contents of the ninth and tenth bits are
cleared to "0''.
"TBL" allows a relative address be added to the current PC, and contents of the ninth and tenth bits don't
change. The most significant bit (A10~A13) will be loaded with the content of bit PS0~PS3 in the status
register (R5) upon the execution of a "JMP'', "CALL'', "ADD R2,A'', or "MOV R2,A'' instruction.
CALL
PC A13 A12 A11 A10 A9 A8 A7~A0
0000 PAGE0 0000~03FF
0001 PAGE1 0400~07FF
RET
RETL
RETI
0010 PAGE2 0800~0BFF
STACK1
STACK2
STACK3
STACK4
STACK5
STACK6
STACK7
STACK8
1110 PAGE14 3800~3BFF
1111 PAGE15 3C00~3FFF
Fig.4 Program counter organization
R3 (Page, Tone1,2 power control, Status register)
76
5 43210
PAGE P_TONE2 P_TONE1 T P Z DC C
Bit 0 (C) : Carry flag
Bit 1 (DC) : Auxiliary carry flag
Bit 2 (Z) : Zero flag
Bit 3 (P) : Power down bit.
Set to 1 during power on or by a "WDTC" command and reset to 0 by a "SLEP" command.
Bit 4 (T) : Time-out bit
Set to 1 by the "SLEP" and "WDTC" command, or during power up and reset to 0 by WDT timeout.
EVENT
T P REMARK
WDT wake up from sleep mode 0
0
WDT time out (not sleep mode 0
1
/RESET wake up from sleep
1
0
power up
11
Low pulse on /RESET
x x X : don't care
Bit 5 (P_TONE1) : Power control bit of Tone generator 1
User can use this bit to power on the tone generator 1
Bit 6 (P_TONE2) : Power control bit of Tone generator 2
User can use this bit to power on the tone generator 2
Ps. Tone frequency is controlled by IOCD and IOCE.
_________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
8 2004/08/10 V5.0
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM78806B.PDF ] | |
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