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EM78P806A Schematic ( PDF Datasheet ) - ELAN Microelectronics

Teilenummer EM78P806A
Beschreibung 8-BIT OTP MICRO-CONTROLLER
Hersteller ELAN Microelectronics
Logo ELAN Microelectronics Logo 




Gesamt 30 Seiten
EM78P806A Datasheet, Funktion
EM78P806A
8-BIT OTP MICRO-CONTROLLER
Version 1.5
ELAN MICROELECTRONICS CORP.
No. 12, Innovation 1st RD., Science-Based Industrial Park
Hsin Chu City, Taiwan, R.O.C.
TEL: (03) 5639977
FAX: (03) 5630118






EM78P806A Datasheet, Funktion
EM78P806A
8-bit OTP Micro-controller
VI.Pin Descriptions
PIN I/O DESCRIPTION
VDD
POWER digital power
AVDD
analog power
VSS POWER digital ground
AVSS
analog ground
Xtin I
Input pin for 32.768 kHz oscillator
Xtout
O
Output pin for 32.768 kHz oscillator
COM0..COM7 O
Common driver pins of LCD drivers
COM8..COM15 O (PORT6)
SEG0...SEG19 O
Segment driver pins of LCD drivers
SEG20..SEG23 O (PORT5)
SEG24..SEG31 O (PORT8)
SEG32..SEG39 O (PORT9)
PLLC
I
Phase loop lock capacitor, 0.01u to 0.047u with AVSS
TIP I Should be connected with TIP side of twisted pair lines
RING
I
Should be connected with RING side of twisted pair lines
RDET1
I
Detect the energy on the twisted pair lines . These two pins coupled to
the twisted pair lines through an attenuating network.
/RING TIME I
Determine if the incoming ring is valid. An RC network may be
connected to the pin.
EST O Early steering output. Presents a logic high immediately when the
digital algorithm detects a recognizable tone-pair (signal condition).
Any momentary loss of signal condition will cause EST to return to a
logic low.
ST/GT
I/O
Steering input/guard time output (bi-directional). A voltage greater than
Vtst detected at ST causes the device to register the detected tone-pair
and update the output latch.
A voltage less than Vtst frees the device to accept a new tone-pair. The
GT output acts to reset the external steering time-constant; its state is a
function of EST and the voltage on ST .
INT0..INT3 PORT7(0..3) PORT7(0)~PORT7(3) signal can be interrupt signals.
P5.4 ~P.57
PORT5
PORT5 can be INPUT or OUTPUT port each bit.
And shared with Segment signal.
P7.0 ~P7.7
PORT7
PORT7 can be INPUT or OUTPUT port each bit.
Internal Pull high function.
Key scan function.
Bit6,7 open drain function
P6.0 ~P6.7
PORT6
PORT6 can be INPUT or OUTPUT port each bit.
And shared with Common signal.
P8.0 ~P8.7
PORT8
PORT 8 can be INPUT or OUTPUT port each bit.
And shared with Segment signal.
P9.0 ~P9.7
PORT9
PORT 9 can be INPUT or OUTPUT port each bit.
And shared with Segment signal.
Bit6,7 has wake-up function.
TEST
I
Test pin into test mode , normal low
TONE
O
Tone generator’s output
RESET
I
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
07/13/2004 V1.5

6 Page









EM78P806A pdf, datenblatt
EM78P806A
8-bit OTP Micro-controller
1,0 10 ms
1,1 5 ms
*Bit6: port8 low nibble switch, 0/1= normal I/O port/SEGMENT output .
*Bit7: port8 high nibble switch , 0/1= normal I/O port/SEGMENT output
9. RC
765432
CIDA7 CIDA6 CIDA5 CIDA4 CIDA3 CIDA2
* Bit 0 ~ Bit 7 select CALLER ID RAM address up to 256.
1
CIDA1
0
CIDA0
10. RD
* Bit 0 ~ Bit 8 are CALLER ID RAM data transfer register.
User can see RB(0) register how to select CID RAM banks.
11. RE
7 6 5 4 3 2 10
STD /WDTE /WUP97 /WUP96 /WURING LCD_C2 LCD_C1 LCD_M
* Bit0 (LCD_M):LCD_M decides the methods, including duty, bias, and frame frequency.
* Bit1~Bit2 (LCD_C#):LCD_C# decides the LCD display enable or blanking. change the display duty must set the
"LCD_C2,LCD_C1" to "00".
LCD_C2,LCD_C1 LCD Display Control
LCD_M duty bias
00
Change duty
0 1/16 1/4
Disable(turn off LCD) 1 1/8 1/4
01
Blanking
::
11
LCD display enable : :
* Bit3 (/WURING, RING Wake Up Enable): used to enable the wake-up function of /RINGTIME input pin.
(1/0=enable/disable)
* Bit4 (/WUP96, PORT9 bit6 Wake Up Enable): used to enable the wake-up function of PORT9 bit6 .
(1/0=enable/disable)
* Bit5 (/WUP97, PORT9 bit7 Wake Up Enable): used to enable the wake-up function of PORT9 bit7 .
(1/0=enable/disable)
* Bit6 (/WDTE,Watch Dog Timer Enable)
Control bit used to enable Watchdog timer.
(1/0=enable/disable)
* Bit7:STD: Delayed steering output. Presents a logic high when a received tone-pair has been registered and
the output latch updated; returns to logic low when the voltage on St/GT falls below V tst.
(0/1= No DATA/DATA Valid )
/WURING
/RINGTIME
/WUP96
PORT96
/WUP97
PORT97
/WDTEN 0/1=enable/disable
/WDTE
Fig.8 Wake up function and control signal
12. RF (Interrupt Status Register)
76
/STD
FSKDATA
54
3
21
0
C8_2 C8_1 INT2/INT3 INT1 INT0 TCIF
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
07/13/2004 V1.5

12 Page





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