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EM78447S Schematic ( PDF Datasheet ) - ELAN Microelectronics

Teilenummer EM78447S
Beschreibung 8-Bit Microcontroller
Hersteller ELAN Microelectronics
Logo ELAN Microelectronics Logo 




Gesamt 30 Seiten
EM78447S Datasheet, Funktion
EM78447S
8-Bit Microprocessor
with OTP ROM
Product
Specification
DOC. VERSION 1.2
ELAN MICROELECTRONICS CORP.
February 2010






EM78447S Datasheet, Funktion
EM78447S
8-Bit Microcontroller with OTP ROM
3 Pin Assignment and Description
3.1 EM78447S Series Pin Assignment
EM78447SAP
EM78447SAM
EM78447SAS
EM78447SBP
EM78447SBWM
TCC
VDD
NC
VSS
/INT
P50
P51
P52
P53
P60
P61
P62
P63
P64
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
DIP
SOP
SOIC
/RESET VSS
OSCI TCC
OSCO VDD
P77 /INT
P76 P50
P75 P51
P74 P52
P73 P53
P72 P60
P71 P61
P70 P62
P67 P63
P66 P64
P65 VSS
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
SSOP
/RESET P55
OSCI P54
OSCO TCC
P77 VDD
P76 NC
P75 VSS
P74 /INT
P73 P50
P72 P51
P71 P52
P70 P53
P67 P60
P66 P61
P65 P62
P63
P64
Figure 3-1 Pin Assignment
1 32
2 31
3 30
4 29
5 28
6 27
7 26
8 25
9 24
10 23
11 22
12 21
13 20
14 19
15 18
16 17
DIP
SOP
SOIC
P56
P57
/RESET
OSCI
OSCO
P77
P76
P75
P74
P73
P72
P71
P70
P67
P66
P65
2 Product Specification (V1.2) 02.04.2010
(This specification is subject to change without further notice)

6 Page









EM78447S pdf, datenblatt
EM78447S
8-Bit Microcontroller with OTP ROM
4.1.4 R3 (Status Register)
Bit 7
GP
Bit 6
PS1
Bit 5
PS0
Bit 4
T
Bit 3
P
Bit 2
Z
Bit 1
DC
Bit 0
C
Bit 7 (GP): General read/write bit
Bits 6 (PS1) ~ 5 (PS0): Page select bits. PS1~PS0 are used to pre-select a program
memory page. When executing a "JMP", "CALL", or other instructions
which cause the program counter to change (e.g., MOV R2, A), the
PS1~PS0 are loaded into the 11th and 12th bits of the program counter
and select one of the available program memory pages.
NOTE
RET (RETL, RETI) instruction does not change the PS0~PS1 bits. That
is, the program will always return to the page from where the subroutine
was called, regardless of the PS1~PS0 bits current setting.
PS1 PS0 Program Memory Page [Address]
00
Page 0 [000-3FF]
01
Page 1 [400-7FF]
10
Page 2 [800-BFF]
11
Page 3 [C00-FFF]
Bit 4 (T): Time-out bit. Set to “1” with the "SLEP" and "WDTC" commands, or
during power up, and reset to “0” with the WDT time-out.
Bit 3 (P): Power down bit. Set to “1” during power on or by "WDTC" command and
reset to “0” by "SLEP" command.
Bit 2 (Z): Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero.
Bit 1 (DC): Auxiliary carry flag
Bit 0 (C): Carry flag
4.1.5 R4 (RAM Select Register)
Bits 7~6: Determine which bank is activated among the 4 banks.
Bits 5~0: Are used to select the registers (Address 00~3F) in the indirect
addressing mode.
If no indirect addressing is used, the RSR can be used as an 8-bit general-purpose
read/writer register. See the data memory configuration in Figure 4-3 above
4.1.6 R5~R7 (Port 5 ~ Port 7)
R5, R6, and R7 are I/O registers
8 Product Specification (V1.2) 02.04.2010
(This specification is subject to change without further notice)

12 Page





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