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EM78459 Schematic ( PDF Datasheet ) - ELAN Microelectronics

Teilenummer EM78459
Beschreibung 8-Bit Microcontroller
Hersteller ELAN Microelectronics
Logo ELAN Microelectronics Logo 




Gesamt 30 Seiten
EM78459 Datasheet, Funktion
EM78458/459
8-Bit Microcontroller
with MASK ROM
Product
Specification
DOC. VERSION 1.4
ELAN MICROELECTRONICS CORP.
May 2005






EM78459 Datasheet, Funktion
Contents
Doc. Version
1.0
1.1
1.2
1.3
1.4
Specification Revision History
Revision Description
Initial version
Modify ERC frequency
Add AD & OP spec
Change Power on reset content
Cancel Code Option CLAMP
Date
2003/03/06
2003/05/07
2003/07/01
2005/05/27
vi Product Specification (V1.4) 05.27.2005

6 Page









EM78459 pdf, datenblatt
EM78458/459
8-Bit Microcontroller with MASK ROM
„ "JMP" instruction allows the direct loading of the lower 10 program counter bits.
Thus, "JMP" allows PC to jump to any location within a page.
„ "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into
the stack. Thus, the subroutine entry address can be located anywhere within a
page.
„ "RET" ("RETL k", "RETI") instruction loads the program counter with the contents
of the top of stack.
„ "ADD R2, A" allows a relative address to be added to the current PC, and the ninth
and tenth bits of the PC are cleared.
„ "MOV R2, A" allows to load an address from the "A" register to the lower 8 bits of
the PC, and the ninth and tenth bits of the PC are cleared.
„ Any instruction that is written to R2 (e.g. "ADD R2, A", "MOV R2, A", "BC R2, 6",⋅⋅⋅⋅⋅)
will cause the ninth bit and the tenth bit (A8~A9) of the PC to be cleared. Thus, the
computed jump is limited to the first 256 locations of a page.
„ In the case of EM78458/459, the most two significant bits (A11 and A10) will be
loaded with the content of PS1 and PS0 in the status register (R3) upon the
execution of a "JMP", "CALL", or any other instructions set which write to R2.
„ All instructions are single instruction cycle (fclk/2 or fclk/4) except for the
instructions which write to R2, need one more instruction cycle.
A11~A10 A9 ~ A8
A7
~
A0
000
00
3 FF
400
01
7FF
800
10
BFF
C00
11
FFF
Page 0
Page 1
Page 2
Page 3
CALL K
RET
RETI
RETL K
Stack 0
Stack 1
Stack 2
Stack 3
Stack 4
Stack 5
Stack 6
Stack 7
Fig. 3 Program Counter Organization
6 Product Specification (V1.4) 05.27.2005
(This specification is subject to change without further notice)

12 Page





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