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Teilenummer | EM78P176N |
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Beschreibung | 8-Bit Microcontroller | |
Hersteller | ELAN Microelectronics | |
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Gesamt 30 Seiten EM78P176N
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.2
ELAN MICROELECTRONICS CORP.
December 2015
Contents
vi Product Specification (V1.2) 12.16.2015
6 Page EM78P176N
8-Bit Microcontroller with OTP ROM
6 Functional Description
6.1 Operational Registers
6.1.1 R0 (Indirect Addressing Register)
R0 is not a physically implemented register. It is used as an indirect addressing
pointer. Any instruction using R0 as a pointer actually accesses data pointed by the
RAM Select Register (R4).
6.1.2 R1 (Timer Clock/Counter)
Incremented by an external signal edge, which is defined by TE bit (CONT-4)
through the TCC pin, or by the instruction cycle clock.
Writable and readable as any other registers.
Defined by resetting PAB (CONT-3).
The prescaler is assigned to TCC, if the PAB bit (CONT-3) is reset.
The contents of the prescaler counter will be cleared only when the TCC register is
written with a value.
6.1.3 R2 (Program Counter and Stack)
Depending on the device type, R2 and hardware stack are 10-bit wide. The
structure is depicted in the following figure.
PC (A9 ~ A0)
Reset Vector
Interrupt Vector
000H
008H
Stack Level 1
Stack Level 2
Stack Level 3
Stack Level 4
Stack Level 5
On-chip Program
Memory
Figure 6-1 Program Counter Organization
3FFH
When ICE300N tries to simulate the stack of EM78P176N, and when the simulated
stacks exceed 5 levels, the simulated result will be inconsistent with the
EM78P176N.
The configuration structure generates 102413 bits on-chip OTP ROM addresses
to the relative programming instruction codes. One program page is 1024 words
long.
R2 is set as all "0" when under RESET condition.
6 Product Specification (V1.2) 12.16.2015
(This specification is subject to change without prior notice)
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ EM78P176N Schematic.PDF ] |
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