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Teilenummer | W78C33B |
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Beschreibung | 8-BIT MICROCONTROLLER | |
Hersteller | Winbond | |
Logo | ||
Gesamt 15 Seiten Preliminary W78C33B
8-BIT MICROCONTROLLER
GENERAL DESCRIPTION
The W78C33B microcontroller supplies a wider frequency range than most 8-bit microcontrollers on
the market. It is functional compatible with the industry standard 80C32 microcontroller series except
the one extra 4-bit bit-addressable I/O port (Port 4).
The W78C33B contains four 8-bit bidirectional parallel ports, three 16-bit timer/counters, and a serial
port. These peripherals are supported by a six-source, two-level interrupt capability. There are 256
bytes of RAM, and the device supports ROMless operation for application programs.
The W78C33B microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
FEATURES
• 8-bit CMOS microcontroller
• Fully static design
• Low standby current at full supply voltage
• DC-40 MHz operation
• 256 bytes of on-chip scratchpad RAM
• ROMless operation
• 64K bytes program memory address space
• 64K bytes data memory address space
• Four 8-bit bidirectional ports
• One extra 4-bit bidirectional port
• Three 16-bit timer/counters
• One full duplex serial port
• Boolean processor
• Six-source, two-level interrupt capability
• Built-in power management
• Packages:
− PLCC 44: W78C33BP-24/40
− QFP 44: W78C33BF-24/40
− TQFP 44: W78C33BM-24/40
Publication Release Date: June 1998
- 1 - Revision A1
Preliminary W78C33B
Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running.
An internal trigger circuit in the reset line is used to deglitch the reset line when the W78C33B is used
with an external RC network. The reset logic also has a special glitch removal circuit that ignores
glitches on the reset line.
During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of
bit 4) to 00H, and all of the other SFR registers except SBUF to 00H. SBUF is not reset.
2. PORT4
Another bit-addressable port P4 is also available and only 4 bits (P4<3:0>) can be used. This port
address is located at 0D8H with the same function as that of port P1.
Example: P4
REG 0D8H
MOV P4, #0AH ; Output data "A" through P4.0−P4.3.
MOV A, P4
; Read P4 status to Accumulator.
SETB P4.0
; Set bit P4.0
CLR P4.1
; Clear bit P4.1
ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Power Supply
Input Voltage
Operating Temperature
Storage Temperature
SYMBOL
VCC−VSS
VIN
TA
TST
MIN.
-0.3
VSS -0.3
0
-55
MAX.
+7.0
VCC +0.3
70
+150
UNIT
V
V
°C
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
-6-
6 Page Timing Waveforms, continued
Port Access Cycle
XTAL1
ALE
PORT
INPUT
SAMPLE
S5
TPDS
TPDH
Preliminary W78C33B
S6 S1
TPDA
DATA OUT
- 12 -
12 Page | ||
Seiten | Gesamt 15 Seiten | |
PDF Download | [ W78C33B Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
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