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PDF DS1339A Data sheet ( Hoja de datos )

Número de pieza DS1339A
Descripción Serial Real-Time Clock
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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DS1339A
Low-Current, I2C, Serial Real-Time Clock
General Description
The DS1339A serial real-time clock (RTC) is a low-
power clock/date device with two programmable time-
of-day alarms and a programmable square-wave output.
Address and data are transferred serially through an I2C
bus. The clock/date provides seconds, minutes, hours,
day, date, month, and year information. The date at the
end of the month is automatically adjusted for months
with fewer than 31 days, including corrections for leap
year. The clock operates in either the 24-hour or 12-hour
format with AM/PM indicator. The DS1339A has a built-
in power-sense circuit that detects power failures and
automatically switches to the backup supply, maintaining
time, date, and alarm operation.
Applications
Handhelds (GPS, POS Terminals)
Consumer Electronics (Set-Top Box, Digital
Recording, Network Appliance)
Office Equipment (Fax/Printers, Copier)
Medical (Glucometer, Medicine Dispenser)
Telecommunications (Routers, Switches, Servers)
Other (Utility Meter, Vending Machine,
Thermostat, Modem)
Features
S Drop-In Replacement for DS1339
S Real-Time Clock (RTC) Counts Seconds, Minutes,
Hours, Day, Date, Month, and Year with Leap-Year
Compensation up to 2200
S I2C Serial Interface
S Two Time-of-Day Alarms
S Programmable Square-Wave Output
S Oscillator Stop Flag
S Automatic Power-Fail Detect and Switch Circuitry
S Trickle-Charge Capability
S Underwriters Laboratories (UL) Recognized
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to www.maximintegrated.com/DS1339A.related.
Functional Diagram
DS1339A
32.768kHz
8.192kHz
4.096kHz
X1 /4 /2 /4096 1Hz
MUX/
BUFFER
SQW/INTB
N
X2
VCC
VBACKUP
SCL
SDA
N
POWER CONTROL
SERIAL BUS
INTERFACE AND
ADDRESS
REGISTER
OSCILLATOR
AND
DIVIDER
CONTROL LOGIC
ALARMS,
TRICKLE CHARGER, AND
CONTROL REGISTERS
CLOCK AND
CALENDAR REGISTERS
USER BUFFER
(7 BYTES)
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-6425; Rev 1; 5/13

1 page




DS1339A pdf
DS1339A
Low-Current, I2C, Serial Real-Time Clock
SDA
tBUF
SCL
tLOW
tHD:STA
STOP START
tR
tHD:DAT
NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN).
tF
tHIGH
tSU:DAT
Figure 1. I2C Timing
tHD:STA
tSU:STA
REPEATED
START
VCC
VPF
tSP
tSU:STO
SCL
RECOGNIZED
tVCCF
SDA
VALID
Figure 2. Power-Up/Down Timing
DON’T CARE
HIGH IMPEDANCE
tVCCR
tREC
RECOGNIZED
VALID
Maxim Integrated
  5

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DS1339A arduino
DS1339A
Low-Current, I2C, Serial Real-Time Clock
Alarms
The DS1339A contains two time of day/date alarms.
Alarm 1 can be set by writing to registers 07h to 0Ah.
Alarm 2 can be set by writing to registers 0Bh to 0Dh.
The alarms can be programmed (by the Alarm Enable
and INTCN bits of the Control Register) to activate the
SQW/INT output on an alarm match condition. Bit 7 of
each of the time of day/date alarm registers are mask
bits (Table 4). When all the mask bits for each alarm
are logic 0, an alarm only occurs when the values in the
timekeeping registers 00h to 06h match the values stored
in the time of day/date alarm registers. The alarms can
also be programmed to repeat every second, minute,
hour, day, or date. Table 4 shows the possible settings.
Configurations not listed in the table result in illogical
operation.
The DY/DT bits (bit 6 of the alarm day/date registers)
control whether the alarm value stored in bits 0 to 5 of
that register reflects the day of the week or the date of
the month. If DY/DT is written to a logic 0, the alarm is
the result of a match with date of the month. If DY/DT is
written to a logic 1, the alarm is the result of a match with
day of the week.
The device checks for an alarm match once per second.
When the RTC register values match alarm register
settings, the corresponding Alarm Flag ‘A1F’ or ‘A2F’
bit is set to logic 1. If the corresponding Alarm Interrupt
Enable ‘A1IE’ or ‘A2IE’ is also set to logic 1 and the
INTCN bit is set to logic 1, the alarm condition activates
the SQW/INT signal. If the BBSQI bit is set to 1, the INT
output activates while the part is being powered by
VBACKUP. The alarm output remains active until the alarm
flag is cleared by the user.
Table 4. Alarm Mask Bits
DY/DT
X
X
X
X
0
1
ALARM1 REGISTER MASK BITS (BIT 7)
A1M4
A1M3
A1M2
A1M1
1111
1110
1100
1000
0000
0000
ALARM RATE
Alarm once per second
Alarm when seconds match
Alarm when minutes and seconds match
Alarm when hours, minutes, and seconds match
Alarm when date, hours, minutes, and seconds match
Alarm when day, hours, minutes, and seconds match
DY/DT
X
X
X
0
1
ALARM2 REGISTER MASK BITS (BIT 7)
A2M4
A2M3
A2M2
111
110
100
000
000
ALARM RATE
Alarm once per minute (00 sec. of every minute)
Alarm when minutes match
Alarm when hours and minutes match
Alarm when date, hours, and minutes match
Alarm when day, hours, and minutes match
Maxim Integrated
  11

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