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CAT28LV64H13I-25T Schematic ( PDF Datasheet ) - Catalyst Semiconductor

Teilenummer CAT28LV64H13I-25T
Beschreibung 64K-Bit CMOS PARALLEL EEPROM
Hersteller Catalyst Semiconductor
Logo Catalyst Semiconductor Logo 




Gesamt 12 Seiten
CAT28LV64H13I-25T Datasheet, Funktion
CAT28LV64
64K-Bit CMOS PARALLEL EEPROM
FEATURES
3.0V to 3.6 V Supply
Read access times:
– 150/200/250ns
Low power CMOS dissipation:
– Active: 8 mA max.
– Standby: 100 µA max.
Simple write operation:
– On-chip address and data latches
– Self-timed write cycle with auto-clear
Fast write cycle time:
– 5ms max.
Commercial, industrial and automotive
temperature ranges
ALOGEN FR
LEA D F REETM
CMOS and TTL compatible I/O
Automatic page write operation:
– 1 to 32 bytes in 5ms
– Page load timer
End of write detection:
– Toggle bit
DATA polling
Hardware and software write protection
100,000 program/erase cycles
100 year data retention
DESCRIPTION
The CAT28LV64 is a low voltage, low power, CMOS
parallel EEPROM organized as 8K x 8-bits. It requires a
simple interface for in-system programming. On-chip
address and data latches, self-timed write cycle with auto-
clear and VCC power up/down write protection eliminate
additional timing and protection hardware. DATA Polling
and Toggle status bit signal the start and end of the self-
timed write cycle. Additionally, the CAT28LV64 features
hardware and software write protection.
The CAT28LV64 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC
approved 28-pin DIP, 28-pin TSOP, 28-pin SOIC or 32-
pin PLCC packages.
BLOCK DIAGRAM
A5–A12
ADDR. BUFFER
& LATCHES
VCC
CE
OE
WE
INADVERTENT
WRITE
PROTECTION
CONTROL
LOGIC
A0–A4
TIMER
ADDR. BUFFER
& LATCHES
ROW
DECODER
HIGH VOLTAGE
GENERATOR
DATA POLLING
AND
TOGGLE BIT
COLUMN
DECODER
8,192 x 8
E2PROM
ARRAY
32 BYTE PAGE
REGISTER
I/O BUFFERS
I/O0–I/O7
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1010, Rev. D






CAT28LV64H13I-25T Datasheet, Funktion
CAT28LV64
DEVICE OPERATION
Read
Data stored in the CAT28LV64 is transferred to the data
bus when WE is held high, and both OE and CE are held
low. The data bus is set to a high impedance state when
either CE or OE goes high. This 2-line control architecture
can be used to eliminate bus contention in a system
environment.
Byte Write
A write cycle is executed when both CE and WE are low,
and OE is high. Write cycles can be initiated using either
WE or CE, with the address input being latched on the
falling edge of WE or CE, whichever occurs last. Data,
conversely, is latched on the rising edge of WE or CE,
whichever occurs first. Once initiated, a byte write cycle
automatically erases the addressed byte and the new
data is written within 5 ms.
Figure 3. Read Cycle
ADDRESS
CE
OE
WE
DATA OUT
tRC
tCE
tOE
VIH
tLZ
HIGH-Z
tOLZ
tOH
DATA VALID
tAA
tOHZ
tHZ
DATA VALID
Figure 4. Byte Write Cycle [WE Controlled]
ADDRESS
CE
tAS tAH
tCS
tWC
tCH
OE
WE
DATA OUT
DATA IN
tOES
tWP
HIGH-Z
tOEH
tBLC
DATA VALID
tDS
tDH
Doc. No. 1010, Rev. D
Doc. No. 1010, Rev. A
6

6 Page









CAT28LV64H13I-25T pdf, datenblatt
REVISION HISTORY
Date
Revision Comments
3/29/04
C Added Green packages in all areas
04/20/04
D Delete data sheet designation
Update Ordering Information
Update Revision History
Update Rev Number
Copyrights, Trademarks and Patents
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:
DPP ™ AE2
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents
issued to Catalyst Semiconductor contact the Company’s corporate office at 408.542.1000.
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS
PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a
situation where personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets
labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate
typical semiconductor applications and may not be complete.
Catalyst Semiconductor, Inc.
Corporate Headquarters
1250 Borregas Avenue
Sunnyvale, CA 94089
Phone: 408.542.1000
Fax: 408.542.1200
www.catalyst-semiconductor.com
Publication #: 1010
Revison:
D
Issue date: 04/20/04

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