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PDF EL4511 Data sheet ( Hoja de datos )

Número de pieza EL4511
Descripción Super Sync Separator
Fabricantes Intersil 
Logotipo Intersil Logotipo



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No Preview Available ! EL4511 Hoja de datos, Descripción, Manual

®
Data Sheet
November 12, 2010
EL4511
FN7009.8
Super Sync Separator
The EL4511 sync separator IC is designed for operation in
the next generation of DTV, HDTV, and projector
applications, as well as broadcast equipment and other
applications where video signals need to be processed.
The EL4511 accepts sync on green, separate sync, and H/V
sync inputs, automatically selecting the relevant format. It is
also capable of detecting and decoding tri-level syncs used
with the latest HD systems. Unlike standard sync separators,
the EL4511 can automatically detect the line rate and locks
to it, without the use of an external RSET resistor.
The EL4511 is available in a 24-pin QSOP package and
operates over the full 0°C to 70°C temperature range.
Ordering Information
PART
NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL4511CU
24-Pin QSOP
-
MDP0040
EL4511CU-T7
24-Pin QSOP
7”
MDP0040
EL4511CU-T13 24-Pin QSOP
13”
MDP0040
EL4511CUZ
(See Note)
24-Pin QSOP
(Pb-Free)
-
MDP0040
EL4511CUZ-T7
(See Note)
24-Pin QSOP
(Pb-Free)
7”
MDP0040
EL4511CUZ-T13 24-Pin QSOP
(See Note)
(Pb-Free)
13”
MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Composite, component, HDTV, and PC signal-compatible
• Tri-level & bi-level sync-compatible
• Auto sync detection
• 150kHz max line rate
• Low power
• Small package outline
• 3.3V and 5V operation
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• HDTV/DTV analog inputs
• Video projectors
• Computer monitors
• Set top boxes
• Security video
• Broadcast video equipment
Pinout
EL4511
(24-PIN QSOP)
TOP VIEW
XTAL 1
VBLANK 2
SYNCLOCK 3
PDWN 4
SDENB 5
SCL 6
SDA 7
GNDD1 8
HIN 9
SYNCIN 10
VERTIN 11
LEVEL 12
24 XTALN
23 ODD/EVEN
22 VERTOUT
21 HOUT
20 BACKPORCH
19 SYNCOUT
18 VCCD
17 GNDD2
16 GNDA2
15 VCCA2
14 VCCA1
13 GNDA1
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
Copyright © Intersil Americas Inc. 2002-2005, 2010. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners. Manufactured under U.S. Patent 5,528,303

1 page




EL4511 pdf
EL4511
VCCA1
VCCD
VERTICAL SYNC
COMPOSITE SYNC
HORIZONTAL SYNC
VERTIN
SYNCIN
HIN
POWER DOWN
PDWN
LOW ACTIVE SERIAL
DATA ENABLE
SERIAL CLOCK
SERIAL DATA
SDENB
SCL
SDA
SLICING
&
ANALOG
PROCESSING
RESET
SERIAL I/F
DIGITAL PROCESSING
RATE
ACQUISITION
OSCILLATOR
REFERENCE
OSCILLATOR
LEVEL
SYNC LEVEL
HOUT
HORIZONTAL O/P
SYNCOUT
COMP SYNC O/P
VERTOUT
VERTICAL O/P
VBLANK
VERTICAL BLANKING O/P
BACKPORCH BACK PORCH O/P
ODD/EVEN ODD/EVEN O/P
SYNCLOCK SYNC LOCK O/P
GNDD1
GNDD2
GNDA1
VCCA2 GNDA2
XTALIN
XTAL
MODE CONTROL PINS
FIGURE 3. BLOCK DIAGRAM
5 FN7009.8
November 12, 2010

5 Page





EL4511 arduino
EL4511
Timing Diagram 2 - Example of Horizontal Interval 525/625 Line Composite
CONDITIONS: VCCA1 = VCCA2 = VCCD = +5V, TA = 25°C, FILTER IN (REGISTER 2 BIT 4 = 1)
COLOR BURST
INPUT
DYNAMIC
SYNC LEVEL
RANGE
0.5V-2V
(@VCCA1=5V) SYNC IN
0.5V-1V
(@VCCA1=3.3V)
50%
SYNC
TIP
VSYNC
(SYNC TIP
VOLTAGE)
VSLICE
WHITE LEVEL
VBLANK
(BLANKING LEVEL
VOLTAGE)
tdSYNCOUT
SYNC OUT
DEPENDS ON WIDTH OF INPUT SYNC AT 50% LEVEL
VIDEO
SYNC
tdHOUT
HOUT
BACKPORCH
THOUT
TBACKPORCH
tdBACKPORCH
Filter In
PARAMETER
DESCRIPTION
tdSYNCOUT
SYNCOUT Timing Relative to Input
tdHOUT
HOUT Timing Relative to Input
tdBACKPORCH BACKPORCH Timing Relative to Input
THOUT
Horizontal Output Width
TBACKPORCH
BACKPORCH (Clamp) Width
NOTE:
1. Delay variation is less than 2.5ns over temperature range.
CONDITIONS
See Timing Diagram 2
See Timing Diagram 2
See Timing Diagram 2
See Timing Diagram 2
See Timing Diagram 2
TYP
(Note 1)
220
470
525
1545
3345
UNIT
ns
ns
ns
ns
ns
11 FN7009.8
November 12, 2010

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