GF9102A Datasheet PDF - Gennum
| Part Number | GF9102A | |
| Description | Decimating/Interpolating Digital Filter | |
| Manufacturers | Gennum | |
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MultiG E N™ GF9102A
Decimating/Interpolating Digital Filter
FEATURES
• improved performance over TMC2242 in applications
not requiring 1:1 low pass filtering
• low power (60mA typical at ƒ = 20MHz)
• 40 MHz maximum clock rate
• single device exceeds CCIR 601 lowpass filter
requirements
• true unity gain (0.0 dB) at DC
• reduced output ringing with constant input in
interpolation mode
• built-in TRS code protection
• 12 bit inputs and 16 bit outputs in 2's complement
signed or unsigned formats
• user-selectable 8 to 16 bit output rounding
• can also be operated as a 9 or 21 tap chroma
bandpass filter under user control
• single +5 V power supply
• three state outputs
APPLICATIONS
• CCIR 601-compliant oversampling video A/D and
D/A conversion
• 2:1 interpolation and decimation
• 4:2:2 to 4:4:4 format conversion
• Chroma bandpass filtering
ORDERING INFORMATION
Part Number
GF9102ACPM
GF9102ACTM
Package Type
44 Pin PLCC
44 Pin PLCC Tape
Temperature Range
0° to 70° C
0° to 70° C
CLK DEC INT SYNC
DATA SHEET
DEVICE DESCRIPTION
The GF9102A is a linear phase FIR digital filter that is usable
in a variety of video signal processing applications. The device
contains three separate fixed coefficient filters and can be
operated in three basic modes: 53 tap low pass filter, 9 tap
chroma bandpass filter or 21 tap chroma bandpass filter.
In the 53 tap low pass filter mode, the GF9102A can replace the
TMC2242 in all applications, except those requiring 1:1 low
pass filtering, for improved performance and full CCIR 601
compatibility. Specific improvements include true unity gain at
DC, 12.4 dB attenuation at ƒs/4 with a single device, reduced
output ringing with constant input in interpolate mode, support
for signed and unsigned data formats, rounding to 10 and 8 bit
CCIR 601 data formats, masking of serial digital TRS codes in
the data stream, and elimination of the non-saturated-type
overflow condition. The device can be operated in both
TMC2242 compatible modes and in GF9102A enhanced
modes.
When used as a decimating post-filter with a double speed
oversampling analog-digital converter, the device greatly
reduces the cost and complexity of the associated analog
anti-aliasing pre-filter. In a similar fashion, when used as an
interpolating pre-filter with a double speed oversampling digital-
analog converter, the GF9102A simplifies the analog
reconstruction post-filter. The GF9102A also exceeds the
requirements for conversion between 4:2:2 and 4:4:4 signal
formats.
For chroma filtering applications, the GF9102A can be operated
as a 9 or 21 tap bandpass filter by selecting the appropriate
operating mode.
The GF9102A is packaged in a 44 pin PLCC and is pin
compatible with the TMC2242. The device operates with a
single +5 V supply.
RND2..0
TCO
TIMING CONTROLS
OUTPUT FORMAT
SO3..0
DATA IN
SI11..0
INPUT
PROCESSING
UNIT
BPF1
BPF2
53 TAP LPF
M OUTPUT
U PROCESSING
X UNIT
DATA OUT
SO15..0
Revision Date: February 1996
FUNCTIONAL BLOCK DIAGRAM
OE
Document No. 521 - 26 - 02
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946
Gennum Japan Corporation: A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168, Japan tel. (03) 3334-7700 fax (03) 3247-8839
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Table 1: Input Data Format and Bit Weighting
Two’s complement signed binary, data range: -1 ≤ SI < 1
SI11
-20
SI10
2-1
SI9
2-2
SI8
2-3
SI7 SI6 SI5 SI4 SI3 SI2 SI1 SI0
2-4 2-5 2-6 2-7 2-8 2-9 2-10 2-11
Unsigned binary, data range: 0 ≤ SI < 256
SI11
27
SI10
26
SI9
25
SI8
24
SI7 SI6 SI5 SI4 SI3 SI2 SI1 SI0
23 22 21 20 2-1 2-2 2-3 2-4
Table 2: Output Data Format and Bit Weighting
Two’s complement signed binary, data range: -1 ≤ SO < 1
SO15
-20
SO14 SO13 SO12 SO11 SO10 SO9 SO8 SO7
2-1 2-2
2-3 2-4
2-5 2-6 2-7 2-8
SO6
2-9
SO5
2-10
SO4
2-11
SO3 SO2
2-12 2-13
SO1
2-14
SO0
2-15
Unsigned binary, data range: 0 ≤ SO < 256
SO15 SO14 SO13 SO12 SO11 SO10 SO9 SO8 SO7
27
26 25
24 23 22 21 20 2-1
SO6
2-2
SO5 SO4
2-3 2-4
SO3 SO2 SO1
2-5 2-6 2-7
SO0
2-8
Table 3: Operation Mode Control
DEC
INT Sync
00
0
00
1
0 1 Sync
1 0 Sync
1 0 Sync
1 1 Sync
Mode
Bandpass1
Bandpass2
Decimating
Interpolating
Interpolating
Pass through
Description
21 Tap Bandpass
9 Tap Bandpass Gain=2
Gain=1
Gain=0.5
Gain=1 for unsigned input3
Top 12 bit pass through
Device Latency
18 Clock Cycles
18 Clock Cycles
33 Clock Cycles
33 Clock Cycles
33 Clock Cycles
33 Clock Cycles
Notes
2
2
1
1
2
2
Notes:
1. This operating mode is compatible with TMC2242.
2. This is an enhanced operating mode of the GF9102A.
3. This mode is invoked using the SO0 pin. See I/O Format control below.
Table 4: I/O Format Control
RND2..0
RND = 000
SO03
Output
TCO
0
Input5
Signed
Output5
I_Unsigned
Notes
1
RND ≠ 000
0
1
Signed
Signed
0
Signed
I_Unsigned
1
RND ≠ 000
1
1
Signed
Signed
0
Unsigned4
Unsigned
2
1
Unsigned
Signed
Limit output up to 15 bits
Notes:
1. This operating mode is compatible with TMC2242.
2. This is an enhanced operating mode of the GF9102A.
3. SO0, the LSB of the output is a bi-directional pad with a large pull-down resistor. This pin does not have to be connected.
When this pin is not connected the GF9102A defaults to a mode compatible with the TMC2242.
4. Application notes for the TMC2242 suggest grounding the MSB of the input if the input data is unsigned as
in most A/D converters. This method limits the input to 11 bits and leads to potential output non-saturated type overflow
since the MSB of the output is ignored.
5. Signed: two’s complement binary data.
I_unsigned: invert all bits in signed data except for the MSB; also called inverted offset binary.
Unsigned: invert MSB of signed data; also called offset binary.
5 521 - 26 - 02
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