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ADP3167 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP3167
Beschreibung 5-Bit Programmable 2-Phase Synchronous Buck Controller
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 16 Seiten
ADP3167 Datasheet, Funktion
a
FEATURES
ADOPT™ Optimal Positioning Technology for Superior
Load Transient Response and Fewest Output Capacitors
Complies with VRM 9.0 with Lowest System Cost
Active Current Balancing between Both Output Phases
5-Bit Digitally Programmable 1.1 V to 1.85 V Output
Dual Logic-Level PWM Outputs for Interface to External
High Power Drivers
Total Output Accuracy ؎0.8% over Temperature
Current-Mode Operation
Short Circuit Protection
Power Good Output
Overvoltage Protection Crowbar Protects
Microprocessors with No Additional
External Components
APPLICATIONS
Desktop PC Power Supplies for:
Intel Pentium® 4 Processors
AMD Athlon™ Processors
VRM Modules
5-Bit Programmable 2-Phase
Synchronous Buck Controller
ADP3160/ADP3167
FUNCTIONAL BLOCK DIAGRAM
VCC
REF
GND
CT
COMP
UVLO
AND
BIAS
3.0V
REFERENCE
SET
RESET
CROWBAR
2-PHASE
DRIVER
LOGIC
CMP3
DAC+24%
OSCILLATOR
CMP
CMP2
DAC–18%
CMP
CMP1
ADP3160/ADP3167
VID
DAC
gm
PWM1
PWM2
PWRGD
CS–
CS+
FB
VID4 VID3 VID2 VID1 VID0
GENERAL DESCRIPTION
The ADP3160 and ADP3167 are highly efficient, dual output,
synchronous buck switching regulator controllers optimized for
converting a 5 V or 12 V main supply into the core supply voltage
required by high-performance processors, such as Pentium 4 and
Athlon. The ADP3160 uses an internal 5-bit DAC to read a volt-
age identification (VID) code directly from the processor that is
used to set the output voltage between 1.1 V and 1.85 V. The
devices use a current-mode PWM architecture to drive two logic-
level outputs at a programmable switching frequency that can be
optimized for VRM size and efficiency. The output signals are
180 degrees out of phase, allowing for the construction of two
complementary buck switching stages. These two stages share the
dc output current to reduce overall output voltage ripple. An
active current balancing function ensures that both phases carry
equal portions of the total load current, even under large transient
loads, to minimize the size of the inductors. The ADP3160 control
ADOPT is a trademark of Analog Devices, Inc.
Athlon is a trademark of Advanced Micro Devices, Inc.
Pentium is a registered trademark of Intel Corporation.
loop has been optimized for conversion from 12 V, while the
ADP3167 is designed for conversion from a 5 V supply.
The ADP3160 and ADP3167 also use a unique supplemental
regulation technique called active voltage positioning to enhance
load transient performance. Active voltage positioning results
in a dc/dc converter that meets the stringent output voltage
specifications for high-performance processors, with the minimum
number of output capacitors and smallest footprint. Unlike
voltage-mode and standard current-mode architectures, active
voltage positioning adjusts the output voltage as a function of
the load current so that it is always optimally positioned for a
system transient. They also provide accurate and reliable short
circuit protection and adjustable current limiting.
The ADP3160 is specified over the commercial temperature
range of 0C to 70C and is available in a 16-lead narrow body
SOIC package.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002






ADP3167 Datasheet, Funktion
ADP3160/ADP3167
THEORY OF OPERATION
The ADP3160 and ADP3167 combine a current-mode, fixed
frequency PWM controller with antiphase logic outputs in a
controller for a 2-phase synchronous buck power converter.
Two-phase operation is important for switching the high currents
required by high-performance microprocessors. Handling the
high current in a single-phase converter would place difficult
requirements on the power components such as inductor wire
size, MOSFET ON resistance, and thermal dissipation. Their
high-side current sensing topology ensures that the load currents
are balanced in each phase, such that neither phase has to carry
more than half of the power. An additional benefit of high-side
current sensing over output current sensing is that the average
current through the sense resistor is reduced by the duty cycle
of the converter, allowing the use of a lower power, lower cost
resistor. The outputs of the ADP3160/ADP3167 are logic
drivers only and are not intended to drive external power
MOSFETs directly. Instead, the ADP3160/ADP3167 should
be paired with drivers such as the ADP3414 or ADP3417. A
system level block diagram of a 2-phase power supply for high
current CPUs is shown in Figure 5.
The frequency of the device is set by an external capacitor
connected to the CT pin. Each output phase operates at half of
the frequency set by the CT pin. The error amplifier and
current sense comparator control the duty cycle of the PWM
outputs to maintain regulation. The maximum duty cycle per
phase is inherently limited to 50% because the PWM outputs
toggle in 2-phase operation. While one phase is on, the other
phase is off. In no case can both outputs be high at the same time.
Output Voltage Sensing
The output voltage is sensed at the FB pin allowing for remote
sensing. To maintain the accuracy of the remote sensing, the
GND pin should also be connected close to the load. A voltage
error amplifier (gm) amplifies the difference between the output
voltage and a programmable reference voltage. The reference volt-
age is programmed between 1.1 V and 1.85 V by an internal 5-bit
DAC that reads the code at the voltage identification (VID) pins.
Refer to Table I for the output voltage versus VID pin code
information.
Active Voltage Positioning
The ADP3160 and ADP3167 use Analog Devices Optimal
Positioning Technology (ADOPT), a unique supplemental
regulation technique that uses active voltage positioning and
provides optimal compensation for load transients. When imple-
mented, ADOPT adjusts the output voltage as a function of the
load current, so that it is always optimally positioned for a load
transient. Standard (passive) voltage positioning has poor dynamic
performance, rendering it ineffective under the stringent repetitive
transient conditions required by high-performance processors.
ADOPT, however, provides optimal bandwidth for transient
response that yields optimal load transient response with the
minimum number of output capacitors.
Reference Output
A 3.0 V reference is available and is commonly used to set the
voltage positioning accurately using a resistor divider to the
COMP pin. In addition, the reference can be used for other
functions such as generating a regulated voltage with an external
amplifier. The reference is bypassed with a 1 nF capacitor to
ground. It is not intended to supply current to large capacitive
loads, and it should not be used to provide more than 1 mA of
output current.
Cycle-by-Cycle Operation
During normal operation (when the output voltage is regulated), the
voltage-error amplifier and the current comparator are the main
control elements. The voltage at the CT pin of the oscillator ramps
between 0 V and 3 V. When that voltage reaches 3 V, the oscillator
sets the driver logic, which sets PWM1 high. During the ON time
of Phase 1, the driver IC turns on the high-side MOSFET. The CS+
and CS– pins monitor the current through the sense resistor that
feeds both high-side MOSFETs. When the voltage between the
two pins exceeds the threshold level set by the voltage error ampli-
fier (gm), the driver logic is reset and the PWM output goes low.
This signals the driver IC to turn off the high-side MOSFET and
turn on the low-side MOSFET. On the next cycle of the oscillator,
the driver logic toggles and sets PWM2 high. On each following
cycle of the oscillator, the outputs toggle between PWM1 and
PWM2. In each case, the current comparator resets the PWM
output low when the current comparator threshold is reached. As
the load current increases, the output voltage starts to decrease.
This causes an increase in the output of the gm amplifier, which in
turn leads to an increase in the current comparator threshold,
thus programming more current to be delivered to the output so
that voltage regulation is maintained.
5V
OR 5V
12V
IL1
PWM1
ADP3412
SYNCHRONOUS
DRIVER
ADP3160/
ADP3167
2-PHASE
SYNCHRONOUS
BUCK
CONTROLLER
5V 5V OR 12V
PWM2
ADP3412
SYNCHRONOUS
DRIVER
IL2
IOUT
IL2
OUT
+
PWM2
PWM1
IL1
Figure 5. 2-Phase CPU Supply System Level Block Diagram
–6–
REV. B

6 Page









ADP3167 pdf, datenblatt
ADP3160/ADP3167
sensing when the current threshold has been reached and when
the high-side MOSFET actually turns off. These two factors are
combined with the inherent voltage at the output of gm amplifier
that commands a current sense threshold of 0 mV (VGNL0):
VGNL
= VGNL0 + IL(RIPPLE )
¥ RSENSE
2
¥ nI
-
( )VIN
-V AVG
L
¥
2 ¥ tD ¥ RSENSE ¥ nI
VGNL
= 1V
+
12.2
A¥
4 mW
2
¥ 12.5
12 V – 1.635V
600 nH ¥ 2 ¥ 60 ns ¥ 4 mW ¥ 12.5 = 1.201V
(23)
The output voltage at no load (VONL) can be calculated by
starting with the VID setting, adding in the positive offset (V+),
subtracting half the ripple voltage, and then subtracting the
dominant error terms:
VONL
= VVID
+V +
-
RE IOD
2
-VVID
¥
kVID 2
+
Ê
ËÁ
kRT
¥
VWIN
VVID
ˆ2
¯˜
VONL
=
1.7 V
+
0V
-
1.38
mW ¥ 9.9
2
A
1.7V ¥
(0.007)2
+ ÊËÁ0.02 ¥
94 mV ˆ 2
1.7V ¯˜
= 1.681V
(24)
With these two terms calculated, the divider resistors (RA
for the upper and RB for the lower) can be calculated.
Assuming that the internal resistance of the gm amplifier
(ROGM) is 200 kW:
RB
= VREF VGNL
RT
VREF
- gm ¥ (VONL
-VVID )
RB
=
3V - 1.2V
7.57 kW
3V
- 2.2 mmho ¥ (1.681V
– 1.7V )
= 10.73 kW
(25)
Choosing the nearest 1% resistor value gives RB = 11.0 kW.
Finally, RA is calculated:
RA =
1
RT
1
-
1
ROGM
-
1
RB
RA
=
1
7.57 kW
-
1
1
200 kW
-
1
11.3
kW
= 25.86 kW
(26)
Again, choosing the nearest 1% resistor value gives RA = 26.1 kW.
The compensating capacitor can be calculated from the equation:
COC
=
COUT
¥ RE ( MAX )
RT
-
2
fOSC
¥ RT
COC
=
19.8 mF ¥ 1.5 mW
7.57 kW
-
p
¥
400
2
kHz
¥
7.57
kW
=
3.5
nF
(27)
The closest standard value for COC is 3.3 nF.
The resistance of the zero-setting resistor in series with the
compensating capacitor is:
RZ
= COC
2
¥p¥
fOSC
RZ
=
3.3 nF
2
¥ p ¥ 400 kHz
= 482
W
(28)
The nearest standard 5% resistor value is 470 W. Note that this
resistor is only required when COUT approaches CCRIT (within
25% or less). In this example, COUT > CCRIT, and RZ can there-
fore be omitted.
–12–
REV. B

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