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PDF ADG858 Data sheet ( Hoja de datos )
| Número de pieza | ADG858 | |
| Descripción | Quad SPDT/2:1 Mux in Mini LFCSP | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
0.58 Ω CMOS, 1.8 V to 5.5 V,
Quad SPDT/2:1 Mux in Mini LFCSP
ADG858
FEATURES
0.58 Ω typical on resistance
0.82 Ω maximum on resistance at 85°C
1.8 V to 5.5 V single supply
High current carrying capability: 250 mA continuous
Rail-to-rail switching operation
Fast-switching times: <20 ns
Typical power consumption: <0.1 μW
2.1 mm × 2.1 mm mini LFCSP
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG858 is a low voltage CMOS device containing four
single-pole, double-throw (SPDT) switches. This device offers
ultralow on resistance of less than 0.82 Ω over the full temperature
range. The ADG858 is fully specified for 4.2 V to 5.5 V and 2.7 V
to 3.6 V supply operation.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG858 exhibits break-before-make switching action.
The ADG858 is available in a 2.1 mm × 2.1 mm, 16-lead mini
LFCSP. This tiny package makes the device ideal for space-
constrained applications, such as handsets, PDAs, and MP3s.
FUNCTIONAL BLOCK DIAGRAM
ADG858
S1A
S1B
D1
S2A
D2
S2B
IN1
S3A
D3
S3B
S4A
D4
S4B
IN2
SWITCHES SHOWN FOR
A LOGIC 1 INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. <0.82 Ω over the full temperature range of −40°C to +85°C.
2. Single 1.8 V to 5.5 V operation.
3. Compatible with 1.8 V CMOS logic.
4. High current handling capability (250 mA continuous
current per channel).
5. Low THD + N: 0.06% typical.
6. 2.1 mm × 2.1 mm, 16-lead mini LFCSP.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADG858
Data Sheet
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
+25°C
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
1
1.35
On-Resistance Match Between Channels, ΔRON 0.05
On-Resistance Flatness, RFLAT (ON)
0.35
LEAKAGE CURRENTS
Source Off Leakage IS (Off )
Channel On Leakage ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
±10
±10
0.004
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tBBM
2
30
50
9
14
25
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
35
−67
−85
−40°C to +85°C
0 to VDD
1.5
0.15
0.79
1.35
0.8
0.05
59
15
11
−67
Total Harmonic Distortion, THD + N
Insertion Loss
−3 dB Bandwidth
CS (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
0.1
−0.06
70
25
75
0.003
1
Unit Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
pA typ
pA typ
VDD = 2.7 V, VS = 0 V to VDD, IS = 100 mA, see Figure 16
VDD = 2.7 V, VS = 0.7 V, IS = 100 mA
VDD = 2.7 V, VS = 0 V to VDD, IS = 100 mA
VDD = 3.6 V
VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V, see Figure 17
VS = VD = 0.6 V or 3.3 V, see Figure 18
V min
V max
µA typ
µA max
pF typ
VIN = VGND or VDD
ns typ
ns max
ns typ
ns max
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V, see Figure 19
RL = 50 Ω, CL = 35 pF
VS = 1.5 V, see Figure 19
ns typ RL = 50 Ω, CL = 35 pF
ns min VS1 = VS2 = 1.5 V, see Figure 20
pC typ VS = 1.5 V, RS = 0 Ω, CL = 1 nF, see Figure 21
dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz, see Figure 22
dB typ
dB typ
%
S1A to S2A/S1B to S2B/S3A to S4A/S3B to S4B,
RL = 50 Ω, CL = 5 pF, f = 100 kHz, see Figure 25
S1A to S1B/S2A to S2B/S3A to S3B/S4A to S4B,
RL = 50 Ω, CL = 5 pF, f = 100 kHz, see Figure 24
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
dB typ RL = 50 Ω, CL = 5 pF, see Figure 23
MHz typ RL = 50 Ω, CL = 5 pF, see Figure 23
pF typ
pF typ
VDD = 3.6 V
µA typ Digital inputs = 0 V or 3.6 V
µA max
1 Guaranteed by design, not subject to production test.
Rev. B | Page 4 of 16
5 Page 
ADG858
TEST CIRCUITS
IDS
V1
SD
VS RON = V1/IDS
Figure 16. On Resistance
IS (OFF)
AS
ID (OFF)
DA
VS VD
VDD
0.1µF
Figure 17. Off Leakage
ID (ON)
NC S D A
VD
Figure 18. On Leakage
VDD
VS
S1B
S1A
D
IN
GND
VDD
0.1µF
VOUT
RL CL
50Ω 35pF
VIN
VOUT
50%
90%
tON
Figure 19. Switching Times, tON, tOFF
50%
90%
tOFF
VDD
VS
S1B
S1A
D
IN
GND
RL
50Ω
VOUT
CL
35pF
VIN 0V
50%
VOUT
80%
tBBM
50%
80%
tBBM
VS
IN
VDD
S1B
D
S1A
GND
Figure 20. Break-Before-Make Time Delay, tBBM
NC
VOUT
1nF
SW ON
VIN
SW OFF
VOUT
∆VOUT
QINJ = CL × ∆VOUT
Figure 21. Charge Injection
Data Sheet
Rev. B | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADG858.PDF ] | |
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