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PDF ADG852 Data sheet ( Hoja de datos )
| Número de pieza | ADG852 | |
| Descripción | SPDT/2:1 Mux Mini LFCSP | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
0.8 Ω typical on resistance
Less than 1 Ω maximum on resistance at 85°C
1.8 V to 5.5 V single supply
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast-switching times: <17 ns
Typical power consumption: <0.1 µW
1.30 mm × 1.60 mm, 10-lead mini LFCSP
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG852 is a low voltage CMOS single-pole, double-throw
(SPDT) switch. This device offers ultralow on resistance of less
than 1 Ω over the full temperature range. The ADG852 is fully
specified for 5.5 V and 3.3 V supply operation.
Each switch conducts equally well in both directions when on,
and has an input signal range that extends to the supplies. The
ADG852 exhibits break-before-make switching action.
The ADG852 is available in a 1.30 mm × 1.60 mm 10-lead
mini LFCSP.
0.8 Ω CMOS, 1.8 V to 5.5 V,
SPDT/2:1 Mux Mini LFCSP
ADG852
FUNCTIONAL BLOCK DIAGRAM
ADG852
S1
D
S2
IN
NOTES
1. SWITCHES SHOWN
FOR A LOGIC 1 INPUT.
Figure 1.
PRODUCT HIGHLIGHTS
1. <1 Ω over full temperature range of −40°C to +85°C.
2. Single 1.8 V to 5.5 V operation.
3. Compatible with 1.8 V CMOS logic.
4. High current handling capability (300 mA continuous
current per channel).
5. Low THD + N: 0.08% typical.
6. 1.30 mm × 1.60 mm, 10-lead mini LFCSP.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices foritsuse,nor foranyinfringementsofpatentsorother
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.
1 page  
ADG852
Data Sheet
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On Resistance Match Between Channels, ∆RON
On Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tBBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion, THD
Insertion Loss
–3 dB Bandwidth
CS (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
+25°C −40°C to +85°C
0 V to VDD
1.3
1.5 1.7
0.03
0.05
0.48
0.66
±10
±30
1.35
0.7
0.002
4
0.05
25
37
7
7.4
22
23
−75
−73
0.15
−0.07
100
20
52
43
8
13
0.002
1.0
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
pA typ
pA typ
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
µA typ
µA max
Test Conditions/Comments
VDD = 2.7 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 16
VDD = 2.7 V, VS = 0.6 V, IDS = 100 mA
VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA
VDD = 3.6 V
VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; see Figure 17
VS = VD = 0.6 V or 3.3 V; see Figure 18
VIN = VGND or VDD
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/0 V; see Figure 19
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; see Figure 19
RL = 50 Ω, CL = 35 pF
VS1 = VS2 = 1 V; see Figure 20
VS = 1.5 V, RS = 0 V, CL = 1 nF; see Figure 21
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
RL = 50 Ω, CL = 5 pF; see Figure 23
RL = 50 Ω, CL = 5 pF; see Figure 23
VDD = 3.6 V
Digital inputs = 0 V or 3.6 V
1 Guaranteed by design, not subject to production test.
Rev. B | Page 4 of 16
5 Page 
ADG852
TEST CIRCUITS
IDS
V1
SD
VS RON = V1/IDS
Figure 16. On Resistance
Data Sheet
IS (OFF)
AS
VS
ID (OFF)
DA
VD
Figure 17. Off Leakage
ID (ON)
NC S D A
VD
Figure 18. On Leakage
VDD
0.1µF
VDD
VS S1B
S1A
D
IN
GND
VDD
0.1µF
VOUT
RL CL
50Ω 35pF
VIN
VOUT
50%
90%
tON
Figure 19. Switching Times, tON, tOFF
VDD
VS S1B
S1A
D
IN
GND
VOUT
RL CL
50Ω 35pF
VIN 0V
50%
VOUT
80%
tBBM
50%
90%
tOFF
50%
80%
tBBM
Figure 20. Break-Before-Make Time Delay, tBBM
VDD
VS D
IN
S1B
S1A
GND
NC
VOUT
1nF
SWITCH ON
VIN
SWITCH OFF
VOUT
ΔVOUT
QINJ = CL × ΔVOUT
Figure 21. Charge Injection
Rev. B | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADG852.PDF ] | |
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