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PDF ADG5236 Data sheet ( Hoja de datos )

Número de pieza ADG5236
Descripción Dual SPDT Switches
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
FEATURES
Latch-up immune under all circumstances
2.5 pF off source capacitance
12 pF off drain capacitance
−0.6 pC charge injection
Low leakage: 0.4 nA maximum at 85°C
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VSS to VDD analog signal range
APPLICATIONS
High voltage signal routing
Automatic test equipment
Analog front-end circuits
Precision data acquisition
Industrial instrumentation
Amplifier gain select
Relay replacement
GENERAL DESCRIPTION
The ADG5236 is a monolithic CMOS device containing two
independently selectable single-pole/double throw (SPDT)
switches. An EN input on the LFCSP package enables or
disables the device. When disabled, all channels switch off. Each
switch conducts equally well in both directions when on and
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked. Both
switches exhibit break-before-make switching action for use in
multiplexer applications.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the device suitable for video signal switching.
High Voltage Latch-Up Proof,
Dual SPDT Switches
ADG5236
FUNCTIONAL BLOCK DIAGRAMS
ADG5236
S1A
D1
S1B
IN1
IN2
S2A
S2B
D2
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1. TSSOP Package
ADG5236
S1A
D1
S1B
S2A
D2
S2B
LOGIC
IN1 IN2 EN
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 2. LFCSP Package
PRODUCT HIGHLIGHTS
1. Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel
transistors thereby preventing latch-up even under severe
overvoltage conditions.
2. Ultralow Capacitance and <1 pC Charge Injection.
3. Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5236 can be operated from dual supplies up to ±22 V.
4. Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG5236 can be operated from a single rail power supply
up to 40 V.
5. 3 V Logic-Compatible Digital Inputs.
VINH = 2.0 V, VINL = 0.8 V.
6. No VL Logic Power Supply Required.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADG5236 pdf
ADG5236
Data Sheet
Parameter
POWER REQUIREMENTS
IDD
ISS
25°C
45
55
0.001
VDD/VSS
1 Guaranteed by design; not subject to production test.
−40°C to +85°C
−40°C to +125°C
70
1
±9/±22
Unit
µA typ
µA max
µA typ
µA max
V min/V max
Test Conditions/Comments
VDD = +16.5 V, VSS = −16.5 V
Digital inputs = 0 V or VDD
Digital inputs = 0 V or VDD
GND = 0 V
±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match
Between Channels, ∆RON
On-Resistance Flatness, RFLAT (ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON
tOFF
Break-Before-Make Time Delay, tD
Charge Injection, QINJ
25°C
140
160
1.3
8
33
45
0.01
0.1
0.01
0.1
0.02
0.2
0.002
3
150
210
150
190
155
180
60
−0.6
−40°C to +85°C
200
9
55
0.2
0.4
0.4
260
235
200
−40°C to +125°C
VDD to VSS
230
10
60
0.4
1.2
1.2
2.0
0.8
±0.1
290
267
215
30
Unit
V max
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
Off Isolation
−85
dB typ
Channel-to-Channel Crosstalk
−85
dB typ
−3 dB Bandwidth
Insertion Loss
266
−7
MHz typ
dB typ
Rev. B | Page 4 of 20
Test Conditions/Comments
VS = ±15 V, IS = −1 mA, see Figure 25
VDD = +18 V, VSS = −18 V
VS = ±15 V, IS = −1 mA
VS = ±15 V, IS = −1 mA
VDD = +22 V, VSS = −22 V
VS = ±15 V, VD = 15 V, see Figure 27
VS = ±15 V, VD = 15 V, see Figure 27
VS = VD = ±15 V, see Figure 24
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 10 V, see Figure 30
RL = 300 Ω, CL = 35 pF
VS = 10 V, see Figure 32
RL = 300 Ω, CL = 35 pF
VS = 10 V, see Figure 32
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 10 V, see Figure 31
VS = 0 V, RS = 0 Ω, CL = 1 nF, see
Figure 33
RL = 50 Ω, CL = 5 pF, f = 1 MHz,
see Figure 28
RL = 50 Ω, CL = 5 pF, f = 1 MHz,
see Figure 26
RL = 50 Ω, CL = 5 pF, see Figure 29
RL = 50 Ω, CL = 5 pF, f = 1 MHz,
see Figure 29

5 Page





ADG5236 arduino
ADG5236
TYPICAL PERFORMANCE CHARACTERISTICS
160
TA = 25°C
140
120
VDD = +18V
VSS = –18V
100
80 VDD = +20V
VSS = –20V
60
VDD = +22V
VSS = –22V
40
20
0
–25 –20 –15 –10
–5 0 5
VS, VD (V)
10 15 20
Figure 5. On Resistance vs. VS, VD (Dual Supply)
25
250
TA = 25°C
200
VDD = +9V
VSS = –9V
150
100
VDD = +16.5V
VSS = –16.5V
VDD = +15V
VSS = –15V
VDD = +13.2V
VSS = –13.2V
50
0
–20 –15 –10
–5
0
5 10 15
VS, VD (V)
Figure 6. On Resistance vs. VS, VD (Dual Supply)
20
500
TA = 25°C
450
400
350
300
250
VDD = 9V
VSS = 0V
VDD = 10.8V
VSS = 0V
VDD = 12V
VSS = 0V
VDD = 13.2V
VSS = 0V
200
150
100
50
0
0 2 4 6 8 10 12
VS, VD (V)
Figure 7. On Resistance vs. VS, VD (Single Supply)
14
Data Sheet
160
TA = 25°C
140
120
VDD = 32.4V
VSS = 0V
100
80
VDD = 36V
VSS = 0V
VDD = 39.6V
VSS = 0V
60
40
20
0
0 5 10 15 20 25 30 35
VS, VD (V)
Figure 8. On Resistance vs. VS, VD (Single Supply)
40
250
VDD = +15V
VSS = –15V
200
150
100
TA = +125°C
TA = +85°C
TA = +25°C
TA = –40°C
50
0
–15 –10
–5
0
5 10 15
VS, VD (V)
Figure 9. On Resistance vs. VD or VS for Different Temperatures,
±15 V Dual Supply
200
180
160 TA = +125°C
140
TA = +85°C
120
100 TA = +25°C
80 TA = –40°C
60
40
20 VDD = +20V
VSS = –20V
0
–20 –15 –10
–5 0
5
VS, VD (V)
10 15 20
Figure 10. On Resistance vs. VD or VS for Different Temperatures,
±20 V Dual Supply
Rev. B | Page 10 of 20

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