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PDF ADP5030 Data sheet ( Hoja de datos )
| Número de pieza | ADP5030 | |
| Descripción | High Performance RF LDO | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Dual, 200 mA, High Performance
RF LDO with Load Switch
ADP5030
FEATURES
Input voltage range: 2.5 V to 5.5 V
Dual, 200 mA low dropout voltage regulators
Tiny, 16-ball, 1.6 mm × 1.6 mm WLCSP
Initial accuracy: ±0.7%
Stable with 1 μF ceramic output capacitors
Overcurrent and thermal protection
High PSRR
76 dB up to 1 kHz
70 dB at 10 kHz
60 dB at 100 kHz
40 dB at 1 MHz
Low output noise
27 μV rms typical output noise at VOUTx = 1.2 V
50 μV rms typical output noise at VOUTx = 2.8 V
Excellent transient response
Low dropout voltage: 175 mV at 200 mA load
60 μA typical ground current at no load, both LDOs enabled
Guaranteed 200 mA output current per regulator
Load switch with low RDSON of 100 mΩ at 1.8 V
High-to-low voltage and low-to-high voltage level shifting logic
−40°C to +125°C junction temperature
APPLICATIONS
RF subsystems
GPS devices
GENERAL DESCRIPTION
The ADP5030 combines two high performance, low dropout
(LDO) voltage regulators, a low RDSON load switch, and level
shifting logic in a tiny, 16-ball, 1.6 mm × 1.6 mm WLCSP to
meet demanding performance and board space requirements.
The low quiescent current, low dropout voltage, and wide input
voltage range of the ADP5030 LDOs extend the battery life of
portable devices. The ADP5030 LDOs maintain power supply
rejection greater than 60 dB for frequencies as high as 100 kHz
while operating with a low headroom voltage.
The ADP5030 can be configured in two different activation
modes for LDO2 and the load switch; these modes are selected
by a dedicated pin (MSEL).
FUNCTIONAL BLOCK DIAGRAM
POWER
SUPPLY AND
PROCESSOR
VDD
C1
1µF
GPO4_1V8
VIN3
VIN3
VIN1
EN1
MSEL
V1_8DIG
GPO2_1V8
GPI0_1V8
GPO0_1V8
GPO1_1V8
VIN2
C5
2.2µF
EN2
GPOUT1
GPIN2
GPIN3
ADP5030
PERIPHERAL
MODULE
LDO1
LDO2
VOUT1
VOUT2
C2
1µF
C3
1µF
VBB
VAUX
LOAD
SWITCH
VIN2
VOUT3
VIO
C4
0.1µF
VIN3
GPIN1
VIN3
GPOUT2
GPOUT3
GPO0_1V2
GPI0_1V2
GPI1_1V2
1.8V INPUT/OUTPUT
SYSTEM
GND
Figure 1.
1.2V INPUT/OUTPUT
SYSTEM
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
ADP5030
Parameter
POWER SUPPLY REJECTION RATIO
Symbol
PSRR
LOAD SWITCH
VIN2 to VOUT3 Resistance
RDSON
Turn-On Times
Turn-On Delay Time
Turn-On Rise Time
LEVEL SHIFTER
tON_DLY
tON_RISE
GPIN1 Input Logic High
GPIN1 Input Logic Low
GPOUT1 Output Logic High
GPOUT1 Output Logic Low
GPOUT1 Output Logic Low
GPIN1 to GPOUT1 Propagation
Delay
GPIN2, GPIN3 Input Logic High
GPIN2, GPIN3 Input Logic Low
GPOUT2, GPOUT3 Output Logic High
GPOUT2, GPOUT3 Output Logic Low
VIH
VIL
VOH
VOL
VOL
tPHL, tPLH
VIH
VIL
VOH
VOL
GPIN2, GPIN3 to GPOUT2, GPOUT3
Propagation Delay
GPIN1, GPIN2, GPIN3 Input Leakage
Current
tPHL, tPLH
ILEAKAGE-GPIN
Test Conditions/Comments
VIN1 = 2.5 V, VOUT1 = 1.2 V, IOUT = 100 mA
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
VIN1 = 3.8 V, VOUT2 = 2.8 V, IOUT = 100 mA
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
Min Typ
76
76
70
60
40
68
68
68
60
40
ILOAD = 200 mA, EN2 = VIH2, MSEL = GPIN1 = GND
VIN2 = 3.6 V
VIN2 = 2.5 V
VIN2 = 1.8 V
VIN2 = 1.8 V, TJ = −40°C to +125°C
VIN2 = 1.8 V, ILOAD = 100 mA, CLOAD = 0.1 μF,
EN2 = VIH2, MSEL = GPIN1 = GND
EN2 rising to 10% of turn-on value
VOUT3 rising from 10% to 90% of turn-on value
VIN1 = 3.6 V, 1.2 V ≤ VIN3 ≤ 3.6 V,
TJ = −40°C to +125°C
0.65 × VIN3
70
80
100
5
8
IOH = 2 mA, VIN2 = 1.8 V
IOL = 1 mA, VIN2 = 1.8 V
IOL = 2 mA, VIN2 = 1.8 V
CLOAD = 30 pF, RLOAD = 1 MΩ, VIN2 = 1.8 V
1.6
0.65 × VIN3
IOH = 2 mA, VIN3 = 1.2 V
IOL = 1 mA, VIN3 = 1.2 V
IOL = 2 mA, VIN3 = 1.2 V
CLOAD = 30 pF, RLOAD = 1 MΩ
GPIN1, GPIN2, GPIN3 = VIN3 or GND, TA = 25°C
GPIN1, GPIN2, GPIN3 = VIN3 or GND
0.95
0.1
Max Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
mΩ
mΩ
130 mΩ
160 mΩ
15 μs
12 μs
0.35 × VIN3
0.16
0.31
20
V
V
V
V
V
ns
0.35 × VIN3
0.17
0.33
20
V
V
V
V
V
ns
μA
1 μA
1 VIN2 minimum supply voltage is 1.1 V or VIN3, whichever is greater. VIN2 maximum supply voltage is 3.6 V or VIN1, whichever is smaller.
2 Dropout voltage is the input-to-output voltage differential when the input voltage is set to the nominal output voltage. It applies only to output voltages above 2.5 V.
3 Start-up time is defined as the time between the rising edge of EN1 to VOUT1 being at 90% of its nominal value.
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE (LDO1, LDO2)1
CAPACITOR ESR
Symbol
CMIN
RESR
Test Conditions
TA = –40°C to +125°C
TA = –40°C to +125°C
Min
0.70
0.001
Typ
Max Unit
μF
1Ω
1 The minimum input and output capacitance should be greater than 0.70 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during capacitor selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with this LDO.
Rev. B | Page 4 of 4
5 Page 
ADP5030
1 VOUT1, 50mV/DIV
2 VOUT2, 10mV/DIV
ILOAD1, 100mA/DIV
3
CH1 50.0mV BW CH2 10.0mV BW M 20.0µs A CH3
CH3 100mA Ω BW
T 10.20%
112mA
Figure 21. Load Transient Response, ILOAD1 = 1 mA to 200 mA, ILOAD2 = 1 mA,
CH1 = VOUT1, CH2 = VOUT2, CH3 = ILOAD1, COUT = 1 μF
VOUT1, 10mV/DIV
1
2 VOUT2, 50mV/DIV
ILOAD2, 100mA/DIV
3
CH1 10.0mV BW CH2 50.0mV BW M 20.0µs A CH3
CH3 100mA Ω BW
T 10.20%
128mA
Figure 22. Load Transient Response, ILOAD1 = 1 mA, ILOAD2 = 1 mA to 200 mA,
CH1 = VOUT1, CH2 = VOUT2, CH3 = ILOAD2
VIN1, 1V/DIV
VOUT1, 10mV/DIV
2
1
VOUT2, 10mV/DIV
3
CH1 1.00V BW CH2 10.0mV BW M 4.00µs A CH4 –80.0mV
CH3 10.0mV BW
T 9.800%
Figure 23. Line Transient Response, VIN1 = 4 V to 5 V, ILOAD1 = 1 mA, ILOAD2 = 1 mA,
CH1 = VIN1, CH2 = VOUT1, CH3 = VOUT2
VIN1, 1V/DIV
VOUT1, 10mV/DIV
2
1
VOUT2, 10mV/DIV
3
CH1 1.00V BW CH2 10.0mV BW M 4.00µs A CH4 –80.0mV
CH3 10.0mV BW
T 9.000%
Figure 24. Line Transient Response, VIN1 = 4 V to 5 V, ILOAD1 = 200 mA,
ILOAD2 = 200 mA, CH1 = VIN1, CH2 = VOUT1, CH3 = VOUT2
VOUT3, 500mV/DIV
1
EN2, 1V/DIV
2
CH1 500mV BW CH2 1.00V BW M 20.0µs A CH2
T 10.40%
820mV
Figure 25. Load Switch Typical Switching Time, ILOAD3 = 500 mA,
CH1 = VOUT3, CH2 = EN2
VOUT3, 500mV/DIV
1
EN2, 1V/DIV
2
CH1 500mV BW CH2 1.00V BW M 20.0µs A CH2
T 10.40%
920mV
Figure 26. Load Switch Typical Switching Time, ILOAD3 = 100 mA,
CH1 = VOUT3, CH2 = EN2
Rev. B | Page 10 of 10
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet ADP5030.PDF ] | |
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