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PDF ADP191 Data sheet ( Hoja de datos )
| Número de pieza | ADP191 | |
| Descripción | High-Side Power Switch | |
| Fabricantes | Analog Devices | |
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Data Sheet
FEATURES
Low RDSON of 105 mΩ at 1.8 V
Internal output discharge resistor (ADP191)
Turn-on slew rate limiting (ADP191)
Low input voltage range: 1.1 V to 3.6 V
500 mA continuous operating current
Built-in level shift for control logic that can be operated
by 1.2 V logic
Low 2 μA (maximum) ground current
Ultralow shutdown current: <1 μA
Ultrasmall 0.8 mm × 0.8 mm, 4-ball, 0.4 mm pitch WLCSP
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
GENERAL DESCRIPTION
The ADP190/ADP191 are high-side load switches designed for
operation from 1.1 V to 3.6 V. These load switchs provide power
domain isolation for extended power battery life. The devices
contain a low on-resistance P-channel MOSFET that supports
more than 500 mA of continuous current and minimizes power
loss. The low 2 μA (maximum) of ground current and ultralow
shutdown current make the ADP190/ADP191 ideal for battery-
operated portable equipment. The built-in level shifter for enable
logic makes the ADP190/ADP191 compatible with modern
processors and GPIO controllers.
Logic Controlled,
High-Side Power Switches
ADP190/ADP191
TYPICAL APPLICATIONS CIRCUIT
VIN
+
GND
–
ADP190
ON
EN OFF
LEVEL SHIFT
AND SLEW
RATE CONTROL
VOUT
LOAD
Figure 1.
VIN
+
GND
–
ON
EN OFF
ADP191
LEVEL SHIFT
AND SLEW
RATE CONTROL
AND LOAD
DISCHARGE
Figure 2.
VOUT
LOAD
The ADP191 controls the turn-on slew rate of the switch to
reduce the input inrush current. The ADP191 also incorporates
an internal output discharge resistor to discharge the output
capacitance when the ADP191 output is disabled.
Beyond operating performance, the ADP190/ADP191 occupy
minimal printed circuit board (PCB) space with an area less than
0.64 mm2 and a height of 0.60 mm. It is available in an ultrasmall
0.8 mm × 0.8 mm, 4-ball, 0.4 mm pitch WLCSP.
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND Pins
VOUT to GND Pins
EN to GND Pins
Continuous Drain Current
TA = 25°C
TA = 85°C
Continuous Diode Current
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +4.0 V
−0.3 V to VIN
−0.3 V to +4.0 V
±1 A
±500 mA
−50 mA
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP190/ADP191 can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that TJ is within the specified
temperature limits. In applications with high power dissipation
and poor PCB thermal resistance, the maximum ambient
temperature may need to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (TJ) of
the device is dependent on the ambient temperature (TA), the
power dissipation of the device (PD), and the junction-to-ambient
thermal resistance of the package (θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) using the
formula
TJ = TA + (PD × θJA)
ADP190/ADP191
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA may vary, depending on
PCB material, layout, and environmental conditions. The speci-
fied values of θJA are based on a 4-layer, 4 inch × 3 inch PCB.
See JESD51-7 and JESD51-9 for detailed information regarding
board construction. For additional information, see the AN-617
application note, MicroCSPTM Wafer Level Chip Scale Package.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12 document,
Guidelines for Reporting and Using Electronic Package Thermal
Information, states that thermal characterization parameters are
not the same as thermal resistances. ΨJB measures the component
power flowing through multiple thermal paths rather than through
a single path, as in thermal resistance (θJB). Therefore, ΨJB thermal
paths include convection from the top of the package as well as
radiation from the package, factors that make ΨJB more useful
in real-world applications. Maximum junction temperature (TJ)
is calculated from the board temperature (TB) and the power
dissipation (PD) using the formula
TJ = TB + (PD × ΨJB)
See JESD51-8, JESD51-9, and JESD51-12 for more detailed
information about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
4-Ball, 0.4 mm Pitch WLCSP
θJA ΨJB Unit
260 58.4 °C/W
ESD CAUTION
Rev. E | Page 5 of 16
5 Page 
Data Sheet
T
VEN
21
ILOAD = 100mA
CLOAD = 1µF
VEN = 3.6V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.2V
CH1 1V CH2 1V
M4µs
A CH1 2.34V
T 15.96µs
Figure 23. ADP190 Typical Turn-On Delay Time with Varying Input Voltage
4.0
VOUT = 3.6V
3.5
3.0
2.5
2.0 VOUT = 1.8V
1.5 VEN = 1.8V
1.0 VOUT = 1.2V
0.5
0
0 100 200 300 400 500
TIME (µs)
Figure 24. ADP191 Typical Turn-On Delay Time with Varying Input Voltage
The rise time is defined as the delta between the time from 10%
to 90% of VOUT reaching its final value. It is dependent on the
RC time constant where C = load capacitance (CLOAD) and R =
RDSON||RLOAD. Because RDSON is usually smaller than RLOAD, an
adequate approximation for RC is RDSON × CLOAD. The ADP190/
ADP191 do not need any input or load capacitor, but capacitors
can be used to suppress noise on the board. If significant load
capacitance is connected, inrush current is a concern.
The ADP191 contains circuitry to limit the slew rate of the
switch turn to reduce the turn on inrush current. See Figure 25
and Figure 26 for a comparison of rise time and inrush current.
ADP190/ADP191
T
VEN
1 VOUT
2
IIN
VOUT = 1.8V
3 ILOAD = 200mA
CLOAD = 1µF
VEN = 3.6V
CH1 2V CH2 2V
CH3 2.00mA Ω
M10µs
A CH1 2.32V
T 40.16µs
Figure 25. ADP190 Typical Rise Time and Inrush Current with CLOAD = 1 μF
T
1
VEN
IIN
2
VOUT
3
CH1 2.00V CH2 100mA
CH3 2.00V
M20.0µs
T 10.20%
A CH1 1.24V
Figure 26. ADP191 Typical Rise Time and Inrush Current with CLOAD = 1 μF
T
VEN
1
VOUT
2
IIN
VOUT = 1.8V
3 ILOAD = 200mA
CLOAD = 4.7µF
VEN= 3.6V
CH1 2V CH2 2V
CH3 2.00mA Ω
M10µs
A CH1 1.00V
T 39.8µs
Figure 27. ADP190 Typical Rise Time and Inrush Current with CLOAD = 4.7 µF
Rev. E | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADP191.PDF ] | |
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